Handling Non-Atomic Operations for 64-bit Variables on a 32-bit Non-Preemptive System

Hi everyone, @Middleware & OS I'm struggling to find sufficient material on handling non-atomic operations, and I'd appreciate some guidance.

I need to maintain a microsecond count in a 64-bit variable, with a 32-bit processor system that uses a non-preemptive scheduler. An ISR will update this variable every microsecond. My system provides functions to clear the variable and read its value.
Since the processor is 32-bit, accessing the entire 64-bit variable atomically might not be possible. Concerned how I can ensure that the read function doesn't retrieve a partially updated value as in reading half from the old value and half from the new value during an interrupt?

In non-preemptive scheduling context now, are there standard approaches to guarantee consistent reads of the 64-bit variable? If so, could anyone help me on some of these techniques?
Solution
Yeah, you are right @Marvee Amasi 👍... @Sterling try to disable interrupts during the read operation to prevent the ISR from updating the variable while you're reading it.This will enable you to read either the old or new value in its entirety.
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