RiscFree™ C/C++ SDK support for India’s C-DAC VEGA RISC-V-based Multi-core CPU
RiscFree is Ashling’s SDK including an IDE, compiler and debugger and provides software development, debug & trace support for RISC-V cores. Since its introduction, Ashling’s RiscFree SDK has been steadily building market share within the embedded tools market and is particularly strong in the RISC-V market where its ease-of-use, broad functionality, plug-in architecture and real-time trace support have made it the go-to-choice for 32-bit and 64-bit RISC core software
development. Ashling has a particular focus on RISC-V and is the first to bring tools to the market supporting heterogeneous, simultaneous, multi-core debugging and tracing of both RISC-V and Arm
cores.
https://riscv.org/news/2024/07/ashling-announces-riscfree-c-c-sdk-support-for-indias-c-dac-vega-risc-v-based-multi-core-microprocessors/
https://www.ashling.com/wp-content/uploads/PR_Ashling_C-DAC_VEGA_July-8_2024.pdf
development. Ashling has a particular focus on RISC-V and is the first to bring tools to the market supporting heterogeneous, simultaneous, multi-core debugging and tracing of both RISC-V and Arm
cores.
https://riscv.org/news/2024/07/ashling-announces-riscfree-c-c-sdk-support-for-indias-c-dac-vega-risc-v-based-multi-core-microprocessors/
https://www.ashling.com/wp-content/uploads/PR_Ashling_C-DAC_VEGA_July-8_2024.pdf
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