How to optimize PCB design for DRV8320 and STM32G431RBT6TR to minimize vias?
Hey everyone,
I'm currently working on a PCB design involving the DRV8320 and the STM32G431RBT6TR. As you can see in the attached images, I'm trying to minimize the number of vias between these two components. Ideally, I'd like to have straight traces with minimal or no vias, maintaining the same orientation of the chips.
However, I'm finding it challenging to maintain the necessary functionality, such as BEMF detection with the Virtual Neutral Point and the different comparators for zero-crossing BEMF.
I would greatly appreciate any help or suggestions on how to change the pin assignments while keeping the required functionality intact. Your expertise and advice would be invaluable!
Thank you in advance! @Helper
I'm currently working on a PCB design involving the DRV8320 and the STM32G431RBT6TR. As you can see in the attached images, I'm trying to minimize the number of vias between these two components. Ideally, I'd like to have straight traces with minimal or no vias, maintaining the same orientation of the chips.
However, I'm finding it challenging to maintain the necessary functionality, such as BEMF detection with the Virtual Neutral Point and the different comparators for zero-crossing BEMF.
I would greatly appreciate any help or suggestions on how to change the pin assignments while keeping the required functionality intact. Your expertise and advice would be invaluable!
Thank you in advance! @Helper
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