Why does enabling SPI peripheral in STM32 Nucleo L476RG change the master bit to 0?

#define SPI_CR1_SPE            6

void SPI_PeripheralControl(SPI_RegDef_t *pSPIX, uint8_t EnOrDi)
{
    if(EnOrDi == ENABLE)
    {
        pSPIX->CR1 |= (1<<SPI_CR1_SPE);
    }
    else
    {
        pSPIX->CR1 &= ~(1<<SPI_CR1_SPE);
    }
}