DevHeads IoT Integration Server•16mo ago

Why does enabling SPI peripheral in STM32 Nucleo L476RG change the master bit to 0?

Guys I'm trying to implement the SPI in my stm32 Nucleo l476RG without hal drivers.

I have have implemented the spi configuration using spi_init function

then when it ready for the communication i enable the SPE: SPI enable using a seprate function which is

#define SPI_CR1_SPE            6

void SPI_PeripheralControl(SPI_RegDef_t *pSPIX, uint8_t EnOrDi)
{
    if(EnOrDi == ENABLE)
    {
        pSPIX->CR1 |= (1<<SPI_CR1_SPE);
    }
    else
    {
        pSPIX->CR1 &= ~(1<<SPI_CR1_SPE);
    }
}

#define SPI_CR1_SPE            6

void SPI_PeripheralControl(SPI_RegDef_t *pSPIX, uint8_t EnOrDi)
{
    if(EnOrDi == ENABLE)
    {
        pSPIX->CR1 |= (1<<SPI_CR1_SPE);
    }
    else
    {
        pSPIX->CR1 &= ~(1<<SPI_CR1_SPE);
    }
}

#define SPI_CR1_SPE            6

void SPI_PeripheralControl(SPI_RegDef_t *pSPIX, uint8_t EnOrDi)
{
    if(EnOrDi == ENABLE)
    {
        pSPIX->CR1 |= (1<<SPI_CR1_SPE);
    }
    else
    {
        pSPIX->CR1 &= ~(1<<SPI_CR1_SPE);
    }
}

#define SPI_CR1_SPE            6

void SPI_PeripheralControl(SPI_RegDef_t *pSPIX, uint8_t EnOrDi)
{
    if(EnOrDi == ENABLE)
    {
        pSPIX->CR1 |= (1<<SPI_CR1_SPE);
    }
    else
    {
        pSPIX->CR1 &= ~(1<<SPI_CR1_SPE);
    }
}

the problem here is when pSPIX->CR1 |= (1<<SPI_CR1_SPE); line executes it changes the master bit in the cr1 register to 0 again

how can i slove this?

Why does enabling SPI peripheral in STM32 Nucleo L476RG change the master bit to 0?

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