438 Replies
I'm using this as a ref
https://docs.arduino.cc/tutorials/uno-r4-minima/shield-guide/#building-your-shield


is this ok ?
and this is awkward but how can I remove these annoying type errors

do I need to do anything else >
?
Looks good!
GitHub
feat: Add Arduino Shield component with standard pin headers by Abs...
Description
Implemented ArduinoShield component with standard pin header configuration
Included proper pin labeling for digital, analog, power, and communication pins
Component accepts optional na...
Type errors require tsconfig to have @tscircuit/core in it i think in the types option
let me do the sch
then I will ask for a review
Yea it should be a single chip- that’ll require changing stuff 😬
yup
One of the annoying things about shields
how do you think we should address inconsistent footprint patterns like this gaps between certain holes and stuff?
you might need to define the pins as a single chip with manual
platedhole
componentsok should I do it ?
yea i think so
there will be other boards as well so whatever technique you do can carry over to those other boards
we're going to do raspberry pi hats, xiao boards and some other stuff
ok but how can we manage

this is strange, have you done
bun install
?yeah
i'm wondering if it's using your global tsci version, @tscircuit/core is installed as a dep of tscircuit
is tscircuit installed
globally ? yeah
no locally to the project
tsconfig.json
must have the dep installed local to the project
yeah
i'm not sure, i'd have to debug it- i would maybe go investigating
ok
i would try to find the template tsconfig from the tsci init command, maybe it has something we missed https://github.com/tscircuit/cli
GitHub
GitHub - tscircuit/cli: Create electronics with React with a local ...
Create electronics with React with a local development server - tscircuit/cli
nvm it was a IDE bug
export const MyChip = (props: ChipProps, children: React.ReactNode) => (
is this the right type for children
?No, children are a prop called “children”, same as react
ChipProps & { children?: any }
GitHub
feat: Add Arduino Shield component with standard pin headers by Abs...
Description
Implemented ArduinoShield component with standard pin header configuration
Included proper pin labeling for digital, analog, power, and communication pins
Component accepts optional na...
we can't export it with the board right ?
that will trigger error of nested boards ?
in this case you do, the user provides their components as children
ok got it
looks good, not sure if the schematic is conventional
I took it from sparkfun not sure from where to take it
ah no that's good
i think if we update some stuff the 3d view may look better- i'm not sure we ever got footprinter strings working with the circuit-json-to-simple-3d package so probably won't look much better- also doesn't look like it supports board outlines
but anyway don't worry about that
GitHub
feat: Add Arduino Shield component with standard pin headers by Abs...
Description
Implemented ArduinoShield component with standard pin header configuration
Included proper pin labeling for digital, analog, power, and communication pins
Component accepts optional na...
@Seve this is on of the common MicroMod boards on sparkfun is it ok ?
https://www.sparkfun.com/sparkfun-micromod-stm32-processor.html
SparkFun MicroMod STM32 Processor
The SparkFun MicroMod STM32 Processor Board is ready to rock your MicroMod world with its ARM® Cortex®-M4 32-bit RISC core!

Thats a processor board and yea thats one of the valid boards
I think we want a “variant” enum to switch the length (should be easy to add)
length of ?
can I assign the issue to me ?
@Seve
yea
you can assign to yourself
variant="processor"
or variant="sensor"
(i don't think sensor is the right name though)
but basically there are two types of micromod boardswhich one is the other variant ?
also check your outline carefully with the "d" key or dimensioning tool
i see some circles that are the wrong way
yup I'm doing it
circles ?

it's called a function board
sorry, i meant the arc is backwards
yeah it's driving me crazy lol
I will fix it
can you do it, I don't have permissions
GitHub
Implement
<MicroModBoard />
· Issue #4 · tscircuit/commonNote: There are two common sizes /bounty $100
like this you mean ?
https://www.sparkfun.com/sparkfun-micromod-wifi-function-board-esp32.html
SparkFun MicroMod WiFi Function Board - ESP32
The SparkFun MicroMod ESP32 Function Board adds additional wireless options to MicroMod Processor Boards that do not have that capability.
Yes there is a guide on micromod boards and their home page mentions the two form factors
A function board is longer

ahh looks good
I will make the function variant now
your corners are pretty crazy looking btw
also no need for silkscreen text in center b/c people will be putting their components there
wdym
yeah I was testing the variant prop with it not implementing it

they're like asymmetric
yeah the outline is the worst
Ai is going crazy I have to do them manually most of the time

should I use a <hole />
?
for this
i wish tscircuit had a better way to do this but you basically need to create an outline builder like this:
ai can generate the code that does this
ok I will try
I think I got the builder working

Yea looks good, you might need to do two corners for the left and right side (two corners should create a double rounded edge)
Nice work, looks really good
wdyt


or this ?

Yea same radius version i think, kind of depends what sparkfun does but same radius makes the most sense to me
Anyway its good and sets a good example for people doing future boards haha

Yea looks like same radius version 👍
how can I do two versions of schPinArrangment ?
Wdym? Theyre the same for both boards iirc
Processor boards and function boards have the same schematic box iirc
yeah but processor expose more pins


They should have the same pins, its the same footprint
so just use the processor one ?
All pins need to be available, the micromod guide lists them. So you could start with the processor board and add any missing, its probably enough
I think there are 63 but i cant remember
one more thing the pill pads for soic not working should I update something ?

works in footprinter not working in runframe
No idea, does the pcb viewer support pills? Sometimes people add svg support but not pcb viewer support
hmmm idk but even PNG not showing them
Yea worth looking into 👍
ok
some pins for eg pin71 in the processor sch it has pinlabel G6, in function board it had pinlabel PWR_EN
@Seve
Hmm not sure, but pinLabels axxepts an array per pin so you can do both
In may be mutli function
ok
is this worth a 3 stars label ?
https://github.com/tscircuit/common/pull/12
Bounties arent really supposed to be eligible for stars towards sponsorship but we’re just kind of letting it go atm
So we’re not going to do explicit labels for bounties since its already a double dip
yeah make sense
@Seve Addressed the reivew
do you have a ref or place I can get the dimensions from
https://github.com/tscircuit/common/issues/3
GitHub
Implement
<XiaoBoard />
· Issue #3 · tscircuit/commonImplements the waveshare xiao standard /bounty $75
I would look at waveshare boards
They share kicad/eagle files and may have a guide
I got the footprint from sparkfun board
Wdym did you convert it somehow?
Like the kicad mod file or something?
your talkin about the pads right ?
Yea
you can press on the pad it gives you the width and height , and I measured the pitch
from an eagle file
ofc
Yea but did you manually type it or something?
We already have a footprint called m2host with the formula
I didn't know that lol
yeah
can it handel the gap ?
That probably isnt reliable, its definitely hard to validate
Yea it does the gap
I would just steal the formula because itll be more reliable
ok
Hehe sorry i guess this one was harder than arduino
yup lol
Fwiw it might be the first one i use 😁
that is amazing
We’re going to make it so these boards are available in the standard library as well
So a lot of people will use it if tscircuit gets popular
I wasted so much time on this 🥹

it was there all along
Haha well fwiw the cutout is kind of bad on it
The guy who made this got the pads wrong a bunch
But eventually i think it got fixrd
yeah the sparkfun bottom pads are little bit longer but that is not an issue right ?
not sure the cutout will look good above the curve in the board ?

Yea no remove the cutout
The outline is sufficient
If sparkfun pads are longer then i would go longer
That footprint was never physically tested
Question everything hahaha
I think the footprint is hard coded I can't chagne anything
no string flags like in normal fps?
Im saying you should copy the formula, not use the string
oh got it
Yea cuz you need to add the custom hole etc anyway
it is exactly like mine lol
0.5 pitch and all
Did you use a formula? I thought i saw hard coded numbers
no I mean like the numbers are like mine , I will use the formula
Right we want to inline the formula in tsx, it’s easier to validate and maintain
can I get another review
https://github.com/tscircuit/common/pull/12/
I stayed up all night and I'm passing out soon 😂
I deleted the diff
fixed the RESET and added the diff png and svg to gitignore
I couldn't find Xiao board on waveshare , can I use this ?
there are a lot of variants tho
most common as board as chat gpt saying

Ahh right seeed
Its seeed not waveshare yep
Thanks merging!
hey
not sure where to find the holes pos for the pads

I looked onine couldn't find any spec for the holes
They are probably standard 0.1in header holes
For the perforated edge or the inner hole?
The perforated edge im not sure,

not sure if we can I use this as a ref wdyt?
Yea sgtm
It doesnt actually matter for soldering afaik
CC @0hmx
@Seve you want the shcematic to right and left only ?

yea generally that's how we like it
we'll need a style guide at some point
@Seve can I use this for any info not in the pdf ?
sure, fwiw that's a "receiver" that you put the board onto, so it's a bit different than actually designing the board iiuc, but should be ok
the receivers have bigger pads and stuff which you wouldn't want on the actual board
I have the pad size from the pdf my issu is with top and bottom pads pos
will that be ok ?
probably
it would be better to download the eagle files if they have them anywhere but they may not ig
I will try to find an
y
got it

the pads on the sides are on both top and bottom
should I make the same pad with the same pinhint from both top and bottom ?
not sure i understand


is it ok to have the same pin hint for both top and bottom pads ?
they should be connected
oh no i don't think so
i'm actually kind of confused
are there two boxes?
you can just specify
layers=["top", "bottom"]
or does that not worklet me check
oh this is kind of interesting, it's really like you want a platedhole with a rect pad and offset hole
I mean we can just make the plated hole do the connectino
tion
between top and bottom
yea but you should be able to do this whole thing (except for the perforation) as a single element
<platedhole padShape="rect" rectWidth="..." holeOffsetX holeOffsetY />
i think we might not fully support it in props but we support it in circuit jsonhow about I make the pinhint for the plated hole only not the pads
it's a hack though, this is an official-ish repo
what do you recommend
GitHub
Plated Hole with hole offsets and rect pad (rect shapes) full suppo...
See plated hole circuit json spec https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_plated_hole.ts We should support plated holes with padShape w/ supported shapes in tscircuit/props,...
wdyt
sounds good
let me start it
@Seve hey I was busy and I'm just starting the plated hole issue , to be clear is this going to be new component <platedholewithpad /> or just add props and the logic to the platedhole.ts
can u clear this for me
it's just platedhole
new props yea
ok
@Seve what are these
already in props
oh lol
Rishabh spent all day implementing that
i totally forgot
CC @Rishabh you saved Abse haha
oh it's missing holeOffsetX and holeOffsetY though i think
is that right?
the pill is
yes
ah ok so you've still got a bit of work, i've reopened the issue
yeah it's not working the shapes are not exposed Ig , maybe core implementation needed ? I will check

Rishabh was super frusterated because of all the dependency updates required, so we're going to prioritize the auto dependency updaters haha
wait
yeah it's working @Seve
I don't think the offset is there tho
yea the types will work after merge to props but you have to pass through the props via core
so you have to update core
I think we need to update circuitJson too
it should have hole offset iirc
maybe but i hope not because that means we'd also need to update svg rendering most likely
no offset

fml
yea gotta add it there, then circuit-to-svg support
do you have OpenAI codex? that might speed it up
nope
do you want it? I can get you a card
yeah that will be amazing
DM'd
@Seve it's taking forever for codex to finish the PR stuck on this

codex takes 10 minutes per PR
oh
usually with codex you spin up a lot of different tasks in parallel, it's not good for active development
there is a codex CLI/vscode extension that might be better for active development
do you still have that prompt for codex ?

Run any tests you introduce or that might be relevant to your changes with "bun test path/to/dir" or "bun test path/to/test/file.test.ts". Run
bun update --latest some-dep
to get the latest version of a dependency. SVG snapshots (where .toMatchSchematicSnapshot or .toMatchSvgSnapshot etc. are used) require setting BUN_UPDATE_SNAPSHOTS=1
prior to bun test ...
. Run "bun run format" at the end. ALWAYS RUN bunx tsc --noEmit
IN TYPESCRIPT PROJECTS TO TYPECHECK!
WHen using codex you'll want to create draft PRs then pull the PRs locally for some types of fixes, so it's good to know about the gh pr checkout 123
command (where 123
is your PR number)GitHub
Add hole offsets to rectangular pad plated holes by Abse2001 · Pul...
Summary
add hole_offset_x/hole_offset_y support to pill and rotated pill plated holes with rectangular pads
document the new offset fields alongside the plated hole type definitions
extend test co...
CC @Rishabh i just want to clarify because we don't normally do offsets, the hole_offset_x in core should be the position AFTER rotation is applied, so the hole is always at
platedhole.center.x + platedhole.hole_offset_x
it's not the "pre-rotation" x/yshould I merge ?
@Seve so what do I need to do in circuit-to-svg
?
Make it work? Idk if hole offsets render right?
Codex could probably do it, just tell it to update corcuit json and make some examples in a single test with a pcb snapshot
do I need to implement it in core first ?
I usually recommend circuit to svg first
I didn't do a circuit-to-svg in a long time
If you donit in circuit to svg first you can have a proper core snapshot test
Ai is really good at circuit to svg, and codex can update deps etc, just make sure to describe what you want well
If you add .diff to the end of a pr url, you can get a patch that codex works with well, just copy and paste the patch https://patch-diff.githubusercontent.com/raw/tscircuit/circuit-json/pull/281.diff
Same as https://github.com/tscircuit/circuit-json/pull/281.diff
ok
@Seve we shouldn't add circuit-json dep right ? we need to update it in tscircuit ?
GitHub
Handle assembly rectangular pad offsets by Abse2001 · Pull Request...
Summary
respect the pill and rotated pill rectangular pad hole offsets in assembly SVG output and propagate rect border radius styling
adjust the rectangular pad renderer to read optional hole off...
Yea although imo it should be allowed as a dev dep
So you could add an exception for circuit json
Nice work!
@Seve https://github.com/tscircuit/circuit-to-svg/pull/320 can you review this , codex created another PR for some reason ?
GitHub
Handle assembly rectangular pad offsets by Abse2001 · Pull Request...
Summary
respect the pill and rotated pill rectangular pad hole offsets in assembly SVG output and propagate rect border radius styling
adjust the rectangular pad renderer to read optional hole off...
@Seve why alot of core tests are not routed on my local repo ?
I had to downgrade bun to
bun -v 1.1.20
just to run the testsI guess it could be becuase of the recent segfaults error in the bun version 1.2.22
do you have the same issue ?
even after the downgrade the routes still fail
on my end
I am on the version 1.2.10, and I don't see that error
ok let me check
Not sure then
thanks for your time I will keep looking
I'm going to try to do the core hole offset with codex and then I'm going to do a clean linux version I think something is wrong
@Seve hay I'm going to build the RPI 4 model b hat+ , chatgpt said it's common wdyt ?
and can you tell me how to fix the props I need to merge the hole offset to finish the xiao board
can I use this eagle file (not an official)
https://forums.raspberrypi.com/viewtopic.php?t=82618
I also found this https://github.com/acrobotic/Ai_HAT_Motor
GitHub
GitHub - acrobotic/Ai_HAT_Motor: PCB design files (EAGLE) for a Ras...
PCB design files (EAGLE) for a Raspberry Pi A+/B+/2/3 HAT carrying a motor/servo drivers (DRV8835 and PCA9685, respectively) and 4-Ch ADC (ADS1115). - acrobotic/Ai_HAT_Motor
@Seve we have this in core and we don't have props special for
PcbHoleRotatedPillWithRectPad
this is the only issue
so we either support it
or remove it ?Ahh ok so we meed to adjust props
Yea lets do it
just one thing why we have PcbHoleRotatedPillWithRectPad & PcbHolePillWithRectPad ?
@Seve
in circuit-json
honestly it's a bit dumb but it also doesn't matter that much, but the goal is to. make it so that it's easy to implement components incrementally
so I will make props
RotatedPillWithRectPadPlatedHoleProps
with what circuitjson need ?i think you just need to add holeOffsetX and holeOffsetY as optional props to something right
yup
to normal pill
yea sounds right
👍
@Seve
why the bot is committing on my PR lol?
we used to have bots do that a lot
but it's mostly a bad idea
GitHub
Commits · tscircuit/props
Prop definitions for tscircuit components. Contribute to tscircuit/props development by creating an account on GitHub.
the bot didn't add new version ?
it didn't get published to npm
does that has something to do with the bot commit or smth?
weird
yea
i'll do a workflow dispatch
ok
GitHub
Use parsed hole offsets for plated pads by Abse2001 · Pull Request...
Summary
normalize holeOffsetX/holeOffsetY in the plated hole constructor so parsed props always carry numeric offsets for rectangular pad variants
consume the normalized offsets in each plated-hol...
do I need to do anything to get this in tscircuit package ?
Itll auto pr to eval so not really
ok
@Seve tscircuit repo has core 733 and I need 734
wdyt for the RPI hat ??
@shehab
as a reference? Yes you can probably use it, i think the hats are pretty simple iirc
@Seve
the xiao borad is almost reday too just waiting from eval to update
Gotcha
Why are there so many empty pins in the pi hat?

this is what I got in the egle file , is there other >?
We should clean this up imo
Yea doesnt look right at all
let me check
Raspi should have an official pinout
ok ok


I cant find a good schematic reference
Yea make sure to include pin aliases, eg GPIO10,MOSI
And use showPinAliases on the schematic
ok
I think we need to just create our own semantic schematic representation woth GND grouped together
Outline looks good
I will try to clean it like GND down V up etc
my thoughts exactly
wdyt can I be a code owner in the repo ?
Sure
@Seve wdyt ?

@Seve should I push it ?
Yea
Lgtm
almost there we only need to support platedhole offset in gerber


@Seve that took alot of time and Ai lol
https://github.com/tscircuit/circuit-json-to-gerber/pull/58
on the good side the SVG looks good and I fixed few things
nice work!!!!
@Seve what should I update to get this ?
gerber supported
runframe ?
yea runframe probably
Thats just a XiaoBoard right?
The XiaoRp2040 would include an RP2040
The title is wromg everyrhing else is good
the fp are not the same
I think
I don't think all xiao boards had one fp
Oof
ok so I think XiaoBoard shouldn't include any inner pads, it should only have the consistent outside pins
<XiaoReceiver variant="RP2040" />
should have the inner pins
the reason if whenever you have *Board
you're defining a board you're creating that contains things, a *Receiver
is when you're soldering an existing component
conceptually, the point of the XiaoBoard
is people will start their prototyping with a Xiao board device, then they'll gradually transition to a custom boardok got it
can you check this
@Seve
woops
the naming is all off, i'll leave some comments
ok
but an XioaRP2040 is something that contains an RP2040
so what should we name it
it's a XiaoReceiver variant="RP2040" or for testing <XiaoReceiverRP2040 />
or XiaoRP2040Receiver />
got it
it's actually not quite right to be a receiver
@Abse it's fine. Let's merge as is
The Receiver doesn't have the outer holes
the most useful thing is the Receiver board and the XiaoBoard (with no variant), those will be the two things people use the most. Having a XiaoBoardRP2040 is a bit odd, but it's not wrong
Generally speaking, we really don't care much about the variants, we just want the common pads
We should add
XiaoReceiver
because people will use that even more than XiaoBoard
like i'll order a keyboard with a <XiaoReceiver />
then ask JLCPCB to place a XiaoRP2040 into itjust the no variant one without the holes ?
yep
the user should still be able to specify
variant
and we should eventually add the inner holes, but the most important part of specifying the variant is actually just so that we can provide the JLCPCB part number so it can be automatically assembled
haha sorry for the confusion, i thought xiao boards were more uniformno problem haha so I will edit the PR to have only the receiver or should I keep these too ?
you can keep them, we'll figure it out incrementally
ok
I would personally probably use the receiver on my first board, but i would also order an XiaoRP2040 with an RP2040 on it
so that issue i created is to wire up an RP2040 to the XiaoBoardRP2040 you created
that would recreate the rp2040-zero
yeah can I get assigned to that ?
yea you have to comment
github thing
ok
@Seve for the reciver without the holes does it have smtpads just on top or for both top and bottom ?
The receiver has holes, just not the perforated edge outer holes
The receiver only had it on bottom yea
oh got it
sorry wdym , like we put the plated holes not the perforated ones
Yep
so we have a top and bottom pads
Oh hmm yea i guess so yea youre right
Wait ok no im an idiot lets make it configurable
Usually no holes
Sorry havemt made one of these before but like the pico, its either with top pads only OR with bottom,top and holes
ok so for the reciver we use top only no holes plated or the edge ones
The edge holes are never on the receiver
And they user could theoretically configure the other plated holes in case they wanted to make the xiao removable via female headers
should we make the plated hole a prop ?
Yea basically “withPlatedHoles”
ok if withPlatedHoles if false we only use a top smtpad no point of using bottom right ?
Yep!
100%
got it
final answer
Hahaha
Appreciate it, sry i got a bit confused there in the middle
haha no worries
should we make the edge holes a prop too ? I just made them false for Reciver but work with any other variant
It doesnt really make sense to have them on as a receiver prop
So is the PR ready to merge?
@Seve https://github.com/tscircuit/common/issues/14
for the CM5Receiver do we want to put it on a board or just a group and import it to any board we want to put the CM5 chip on ?
GitHub
Create
<CM5Receiver />
module · Issue #14 · tscircuit/commonIt has two small things this plugs into: https://www.raspberrypi.com/products/compute-module-5/?variant=cm5-104032 Needs to expose all the CM5 pins KiCad Files https://pip.raspberrypi.com/categorie...
also for the distance between the board to board connectors I had to measure it by the ruler to be almost 34 mm from the kicad file that you taged from the issue


I sent the kicad file to chatgpt and it said it's 33.98 mm

@Seve is this still valid someone is PRing to fix and claim
https://github.com/tscircuit/easyeda-converter/issues/124
GitHub
[C388629] Failed to import from JLCPCB · Issue #124 · tscircuit/e...
I tried to import the part number C388629 from JLCPCB, but it failed. Here's the error I got: Failed to generate snippet from JLCPCB part: Invalid shape type: A~M 380 304 A 4 4 0 1 1 380 296~~#...
it is failing in tscircuit.com I checked
@Seve can you review this
@Seve are you going to publish the common repo to npm soon so I can start working on the RP2040 ?
Yea i couldn’t because of the typecheck
If that gets fixed will do
Might need to yalc until then!!!!
@Seve and for the CM5 receiver do we need a board or just a group to put the connector on any board we want ?
No board i think yea
Just a ComputeModule5Receiver
when ever you got time review this all tests are passing in common repo now too
https://github.com/tscircuit/common/pull/15
@Seve
Kk will publish in a minute and itll autopublish after that
build is still failing

let me check it
i'm going to be afk in a sec
also try not to have spaces in directory names
lib
is the standard directory for libsoh ok got it
i'm going afk for 2 hours but i published w/o types, and merges (which i can review remotely, or you can merge w/ good judgement) should publish new versions via the workflow
I fixed the build command
we are live on npm https://github.com/tscircuit/common
GitHub
GitHub - tscircuit/common: Common/community-contributed components
Common/community-contributed components. Contribute to tscircuit/common development by creating an account on GitHub.
@Seve I'm not sure what to do with the schematic wdyt ?
https://github.com/tscircuit/common/pull/17
GitHub
GitHub - tscircuit/common: Common/community-contributed components
Common/community-contributed components. Contribute to tscircuit/common development by creating an account on GitHub.
For the CM5 it's SVG issue 3d viewer is fine
hmm we should patch that- but also i think adding a board would be helpful
CC @Andrii
About the schematic box what should we do, how can I make two connectors in one box with two 3d models and when ordering the quantity should be two?
there's an issue for it
what do other people do?
i'd like if it was a single box i think https://github.com/tscircuit/core/issues/1348
GitHub
Support a
<subcircuit />
/<group />
having a single schematic bo...We want to enable subcircuits to have a single schematic box representation, this way you can have e.g. a group of pinheaders representing a single schematic box for an arduino shield. Propose any ...
In kicad the two connectors are one component
yea ok so we have to merge the fix for this issue first then i think
Yeah I will try to start working on it tomorrow hopefully
@Seve
GitHub
feat(group): add schematic box customization props by Abse2001 · P...
Summary
add spacing, style, label, and symbol configuration props for group schematic boxes
document the new group schematic customization props in README and generated component docs
cover the ne...
wait I don't think we need schSymbol or Display value
@Seve do we need any other props ? connections and show as sch box already implemented ?
GitHub
feat(group): add schematic box customization props by Abse2001 · P...
Summary
add spacing, style, label, and symbol configuration props for group schematic boxes
document the new group schematic customization props in README and generated component docs
cover the ne...
i think that's good!
nice
btw the autocomplete endpoint is merged
will test if it works soon
GitHub
Add schematic pin arrangement schema support for schematic box grou...
PR Body
add schematic_pin_arrangement (with alias map support) to schematic components while keeping port_arrangement for backwards compatibility
allow source/schematic groups to publish schematic...
@Seve hey wdym in the request change
I'm using codex and kinda lost in here haha

schematic_component
has is_schematic_group
yeah
so that has everything you need
you don't need to change circuit-json
ok nice so I can tick the circuit json step from the issue right ?
ok now to core implementation
it's probably done but you might need to add something if you find an issue during implementation in core
but probably complete
@Seve when trying to run tsci dev

I'm not sure what is the issue
You should reproduce in eval
@shibo worked on this
ok
@Seve something like this right ?
it is passing tho so idk what is the issue
Hmmmmmm
@shibo might know whats up
The next step could be to replicate in RunFrame
maybe in cli ?
I will check both
Idk seems like a webworker thing to me
In fact
In that eval test you should try with the webworker
working
Yea strange, but if its a cors issue itll fail in runframe
Thats the only thing i can think og
Also check network panel for failed request
working


on runframe
Not a good test
You need to have runframe run eval
Gotta provide the source as a prop
ok
fsMap
After that, next test would go to tscircuit.com running local
we got the same error

Nice
Any network request failures?
You could PR to at least give people a good repro fwiw

Not found? We should throw a better error
jsdelvivr isnt indexing it maybe
Maybe because its new
what is jsdelvivr
A cdn for npm packages
jsDelivr
@tscircuit/common CDN by jsDelivr - A CDN for npm and GitHub
A free, fast, and reliable CDN for @tscircuit/common. These are community-contributed "common" boards or components distributed with tscircuit
Cdn url is different tho
Also why would it work in eval
I think RunFrame might have a weird config or something
Maybe check urls in eval vs runframe?
ok
Make sure eval is latest too in runframe
yeah latest
is this test correct?
it's passing
in run frame
Its passing cuz its in bun right
Vs the browser
yeah this is in bun
but why
The browser repro could be repros/repro01.page.tsx
In runframe
ok
Yea i would ask ai, the network request is the most important thing to mention and copy and paste as curl and give it all the data
how to run the same test on browser in eval ?>
in tests folder right >
Playwright
dude it's working in the preview

I'm too sleepy for this lol
I will keep looking tomorrow
Da fuq
pushing this thread to show again
hehe we always have the funnest bugs
@Seve what is the bun version your using even after wsl clean install still not working in core tests
abse@DESKTOP-DJTK2QV:~/core$ which bun
/home/abse/.bun/bin/bun
abse@DESKTOP-DJTK2QV:~/core$ bun --version
1.2.22
abse@DESKTOP-DJTK2QV:~/core$
I don't know wtf is going on
omg I got it finally I had to remove node modules after finishing the install
@Seve group shown as one schematic box is almost ready


Nice
@Seve idk wtf is the snapshots issue when I pushed the PR I didn't get these changes
https://github.com/tscircuit/core/pull/1406
GitHub
Add Group Schematic Box Rendering Support by Abse2001 · Pull Reque...
Summary
Allow &lt;group showAsSchematicBox&gt; to render descendants as a single schematic box with generated interface pins.
Add GroupInterfacePort, owner lookups, and is_schematic_group ...
why the images are changing
and the new test snapshots are not loading for me in the files changed ?
locally they do
i would checkout the snapshots from origin/main (revert) then rerun
usually this happens when you are getting ready to merge from main and there are minor dep changes
it can sometimes cause images to change, then get fixed, but still get added to the PR
yeah that worked but the new test snapshot is not showing on web ?
https://github.com/tscircuit/core/pull/1407
GitHub
Add Group Schematic Box Rendering Support by Abse2001 · Pull Reque...
Summary
Allow &lt;group showAsSchematicBox&gt; to render descendants as a single schematic box with generated interface pins.
Add GroupInterfacePort, owner lookups, and is_schematic_group ...
any naming recommendation 😅

are we in the right track regarding this PR?
you're on the right track, it's just trying to make your changes minimal and apply the best patterns
suppression is a super weird word to use
I blame AI
you should try to be more honest with the name,
isGroupShownAsSchematicBox
i believe is what that var should be
new terms = additional complexityyeah got it I'm bad at naming so I leave Ai do them most of the time lol
the GroupInterfacePort is really confusing because it doesn't generate any circuit json
fwiw yes i think generally this PR is correct, it might take two iterations to get it to the right place though
isParentGroupShownAsSchematicBox
ok let me take a step back and review the comments I will clean it and tag you
kk sg, it's good though, just trying to make sure we can easily maintain it
is naming the hardest part of coding or is it just a myth?
💯
naming = api design = hardest part
@Seve https://github.com/tscircuit/core/pull/1407 pushed a patch regarding your review and added comments using AI to try to explain why we need
GroupInterfacePort
can you recheckGitHub
Add Group Schematic Box Rendering Support by Abse2001 · Pull Reque...
Summary
Allow &lt;group showAsSchematicBox&gt; to render descendants as a single schematic box with generated interface pins.
Add GroupInterfacePort, owner lookups, and is_schematic_group ...
the word "suppress" is still all over
wat
omg I forgot
give me a sec
for _areSchematicPhasesSuppressed can we call it _shouldSkipSchematicPhases
i suggested
isParentGroupSchematicBox
which makes a lot more sense to me
shouldSkipSchematicPhase
is a derivative property of that, it would be a function that uses isParentGroupSchematicBox
(if you did want to have it)
isParentGroupSchematicBox
is also a computed property
as long as it's a computed property it's possible ok to have _shouldSkipSchematicPhases()
but if it's not computed it would be bad and confusing😵💫 yup naming is the worst
_skipSchematicRenderingForDescendants for _skipSchematicRenderingForChildren ?
sorry I didn't push I was asking here @Seve
.
don't store isParentGroupShownAsSchematicBox as a boolean
it is a computed property
don't create state because state increases complexity
_isParentGroupShownAsSchematicBox()
is fine,
also idk because this is a lot of effort we might have to do this the "right way"
so technically when schematic components are inside a group they should still be rendered, but they just don't appear by default
idk we can skip it for now but it is a concern
yea it's fine we can skip for nowhey dude sorry but I need another review it's probably not ready merge but can you give me another feedback
https://github.com/tscircuit/core/pull/1407
GitHub
Add Group Schematic Box Rendering Support by Abse2001 · Pull Reque...
Summary
Allow &lt;group showAsSchematicBox&gt; to render descendants as a single schematic box with generated interface pins.
Add GroupInterfacePort, owner lookups, and is_schematic_group ...
I looked over this, i think selectAll needs to work for ports and i dont think we. Should do custom port resolution
Im walking :proudpoppy: but will try to make a video
It feels like a group interface port is really just a port, and we shouldn’t really have it be a dummy class
The group interface port just needs to match with the underlying pcb port to determine position
can we reuse the children port ids in the new group box port ids?
i don't think that makes sense,
like what is the perfect circuit json that would match your intuitive expectation?
I think i would expect TWO schematic ports at that position

ok ok got it
yea in some ways this is a lot easier, in some ways a bit tricky, but I think the Circuit JSON will make it easy to say "oh this is where R1.1 is but also G1.input"
so we need to create another port on top of the schematic port (tried that but I think the autorouter don't like that fail time out cause of iteration ?
@Seve am I missing something ?
yes that's right
sry for the delay
but how is the autoroutner going to act ?
I mean isn't ports a no go zone ?
idk but if there's an autorouter bug that's a separate bug
can a trace go next to a port that it's not connected too ?
or do you mean connect both
chiled and the group
yea i think that should be fine? it's technically connected to both so that part is a bit weird
but otherwise i don't see an issue with it
hey @Seve whenever your ready I need a review
https://github.com/tscircuit/core/pull/1407
GitHub
Add Group Schematic Box Rendering Support by Abse2001 · Pull Reque...
Summary
Allow &lt;group showAsSchematicBox&gt; to render descendants as a single schematic box with generated interface pins.
Add GroupInterfacePort, owner lookups, and is_schematic_group ...
I added checks in the test to make sure and add consoles to make sure box and pinheaders have there own schematics ports with different ports in the same pos
👀
sorry i should be helping more with this, but i still think something is weird
yeah there is
why can't you just add ports to the group? is that complex
group doesn't have a source component id
it has a group id
error: <port#41(pin:1 .Shield>.D1) /> has no parent source component (parent: <group#22 name=".Shield" />)
iiuc
ah ok cool
so we need to figure out "should a group have a source_component since it has a schematic_component?"
does it makes sense etc.
I think we can give groups a schematic component
i'm slowly figuring out what the data model is
ok
if it's showschematicbox only right?
either that or we make it so that
source_port
doesn't need a source_component_id
etc.
yea only if it's schematic box
we might be messing up but it's kind of unclear what a component really isso I tried just doint this
if (this._isShowAsSchematicBoxEnabled()) {
const source_component = db.source_component.insert({
ftype: "simple_group" as any,
name: this.name,
})
this.source_component_id = source_component.source_component_id
}
yea basically
and we got another issue
error: <port#41(pin:1 .Shield>.D1) /> has no parent pcb component, cannot render pcb_port (parent: <group#22 name=".Shield" />)
although
group_as_schematic_box
is a better name for the "ftype" (which will need to be added to circuit-json later, but not an immediate concern)pcb
uhh
so for the PCB i think the pcb_component should be underlying pcb component
hmm
yea i think that is correct 🤔
underlying ?
yea the red

so the R1.pcb_component_id
sorry it's almost morning here I'm not thinking right 😵💫
i mean so i'm starting to think we can simplify this
and do it in two parts, but maybe i'm wrong
your call I would love to get it in steps to make sure we do this right
tbc you're doing great
I'm wondering if we could get this to work as a first step to simplify/break up. the PR
Because this is conceptually very similar
It's almost like a "port alias" or something
but yea you're doing great, it's not an easy thing to figure out, is pretty deep in our embedded stuff
yeah and I don't want to bring everything down with a small bug lol
core is hot
ok will do this tomorrow (today it's morning lol)
tyty
yea no you're doing great, exactly the kind of discussions/work i want to be having
just to be clear we still want a group port for the schematic but use the underlying port of the pcb components (eg R1) right
so in the output circuit json there will be a port for the group and R1
one thing we can do to communicate this detail better to future contributors and ourselves is to add a
debugPorts: true
feature to circuit-to-svg
that clearly shows different port locations and their component. This will help us create great tests