Abse - @Seve I'

@Seve I'
438 Replies
Abse
AbseOP3w ago
No description
Abse
AbseOP3w ago
No description
Abse
AbseOP3w ago
is this ok ?
Abse
AbseOP3w ago
and this is awkward but how can I remove these annoying type errors
No description
Abse
AbseOP3w ago
do I need to do anything else > ?
Seve
Seve3w ago
Looks good!
Abse
AbseOP3w ago
GitHub
feat: Add Arduino Shield component with standard pin headers by Abs...
Description Implemented ArduinoShield component with standard pin header configuration Included proper pin labeling for digital, analog, power, and communication pins Component accepts optional na...
Seve
Seve3w ago
Type errors require tsconfig to have @tscircuit/core in it i think in the types option
Abse
AbseOP3w ago
let me do the sch then I will ask for a review
Seve
Seve3w ago
Yea it should be a single chip- that’ll require changing stuff 😬
Abse
AbseOP3w ago
yup
Seve
Seve3w ago
One of the annoying things about shields
Abse
AbseOP3w ago
how do you think we should address inconsistent footprint patterns like this gaps between certain holes and stuff?
Seve
Seve3w ago
you might need to define the pins as a single chip with manual platedhole components
Abse
AbseOP3w ago
ok should I do it ?
Seve
Seve3w ago
yea i think so there will be other boards as well so whatever technique you do can carry over to those other boards we're going to do raspberry pi hats, xiao boards and some other stuff
Abse
AbseOP3w ago
ok but how can we manage
No description
Seve
Seve3w ago
this is strange, have you done bun install?
Abse
AbseOP3w ago
yeah
Seve
Seve3w ago
i'm wondering if it's using your global tsci version, @tscircuit/core is installed as a dep of tscircuit is tscircuit installed
Abse
AbseOP3w ago
globally ? yeah
Seve
Seve3w ago
no locally to the project tsconfig.json must have the dep installed local to the project
Abse
AbseOP3w ago
No description
Abse
AbseOP3w ago
yeah
Seve
Seve3w ago
i'm not sure, i'd have to debug it- i would maybe go investigating
Abse
AbseOP3w ago
ok
Seve
Seve3w ago
i would try to find the template tsconfig from the tsci init command, maybe it has something we missed https://github.com/tscircuit/cli
GitHub
GitHub - tscircuit/cli: Create electronics with React with a local ...
Create electronics with React with a local development server - tscircuit/cli
Abse
AbseOP3w ago
nvm it was a IDE bug export const MyChip = (props: ChipProps, children: React.ReactNode) => ( is this the right type for children ?
Seve
Seve3w ago
No, children are a prop called “children”, same as react ChipProps & { children?: any }
Abse
AbseOP3w ago
GitHub
feat: Add Arduino Shield component with standard pin headers by Abs...
Description Implemented ArduinoShield component with standard pin header configuration Included proper pin labeling for digital, analog, power, and communication pins Component accepts optional na...
Abse
AbseOP3w ago
we can't export it with the board right ? that will trigger error of nested boards ?
Seve
Seve3w ago
in this case you do, the user provides their components as children
Abse
AbseOP3w ago
ok got it
Seve
Seve3w ago
looks good, not sure if the schematic is conventional
Abse
AbseOP3w ago
I took it from sparkfun not sure from where to take it
Seve
Seve3w ago
ah no that's good i think if we update some stuff the 3d view may look better- i'm not sure we ever got footprinter strings working with the circuit-json-to-simple-3d package so probably won't look much better- also doesn't look like it supports board outlines but anyway don't worry about that
Abse
AbseOP3w ago
GitHub
feat: Add Arduino Shield component with standard pin headers by Abs...
Description Implemented ArduinoShield component with standard pin header configuration Included proper pin labeling for digital, analog, power, and communication pins Component accepts optional na...
Abse
AbseOP3w ago
@Seve this is on of the common MicroMod boards on sparkfun is it ok ? https://www.sparkfun.com/sparkfun-micromod-stm32-processor.html
SparkFun MicroMod STM32 Processor
The SparkFun MicroMod STM32 Processor Board is ready to rock your MicroMod world with its ARM® Cortex®-M4 32-bit RISC core!
No description
Seve
Seve3w ago
Thats a processor board and yea thats one of the valid boards I think we want a “variant” enum to switch the length (should be easy to add)
Abse
AbseOP3w ago
length of ? can I assign the issue to me ? @Seve
Seve
Seve3w ago
yea you can assign to yourself variant="processor" or variant="sensor" (i don't think sensor is the right name though) but basically there are two types of micromod boards
Abse
AbseOP3w ago
which one is the other variant ?
Seve
Seve3w ago
also check your outline carefully with the "d" key or dimensioning tool i see some circles that are the wrong way
Abse
AbseOP3w ago
yup I'm doing it circles ?
Seve
Seve3w ago
No description
Seve
Seve3w ago
it's called a function board sorry, i meant the arc is backwards
Abse
AbseOP3w ago
yeah it's driving me crazy lol I will fix it can you do it, I don't have permissions
Abse
AbseOP3w ago
SparkFun MicroMod WiFi Function Board - ESP32
The SparkFun MicroMod ESP32 Function Board adds additional wireless options to MicroMod Processor Boards that do not have that capability.
Seve
Seve3w ago
Yes there is a guide on micromod boards and their home page mentions the two form factors A function board is longer
Abse
AbseOP3w ago
No description
Seve
Seve3w ago
ahh looks good
Abse
AbseOP3w ago
I will make the function variant now
Seve
Seve3w ago
your corners are pretty crazy looking btw also no need for silkscreen text in center b/c people will be putting their components there
Abse
AbseOP3w ago
wdym yeah I was testing the variant prop with it not implementing it
Seve
Seve3w ago
No description
Seve
Seve3w ago
they're like asymmetric
Abse
AbseOP3w ago
yeah the outline is the worst Ai is going crazy I have to do them manually most of the time
Seve
Seve3w ago
No description
Abse
AbseOP3w ago
should I use a <hole /> ? for this
Seve
Seve3w ago
i wish tscircuit had a better way to do this but you basically need to create an outline builder like this:
outlineBuilder(0,0)
.lineTo(0,10)
.corner({ radius: 2, turn: "cw" })
.lineTo(10,10)
.toArray()
outlineBuilder(0,0)
.lineTo(0,10)
.corner({ radius: 2, turn: "cw" })
.lineTo(10,10)
.toArray()
ai can generate the code that does this
Abse
AbseOP3w ago
ok I will try I think I got the builder working
Abse
AbseOP3w ago
No description
Seve
Seve3w ago
Yea looks good, you might need to do two corners for the left and right side (two corners should create a double rounded edge) Nice work, looks really good
Abse
AbseOP3w ago
wdyt
Abse
AbseOP3w ago
No description
Abse
AbseOP3w ago
No description
Abse
AbseOP3w ago
or this ?
Abse
AbseOP3w ago
No description
Abse
AbseOP3w ago
Seve
Seve3w ago
Yea same radius version i think, kind of depends what sparkfun does but same radius makes the most sense to me Anyway its good and sets a good example for people doing future boards haha
Abse
AbseOP3w ago
No description
Seve
Seve3w ago
Yea looks like same radius version 👍
Abse
AbseOP3w ago
how can I do two versions of schPinArrangment ?
Seve
Seve3w ago
Wdym? Theyre the same for both boards iirc Processor boards and function boards have the same schematic box iirc
Abse
AbseOP3w ago
yeah but processor expose more pins
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No description
Seve
Seve3w ago
They should have the same pins, its the same footprint
Abse
AbseOP3w ago
so just use the processor one ?
Seve
Seve3w ago
All pins need to be available, the micromod guide lists them. So you could start with the processor board and add any missing, its probably enough I think there are 63 but i cant remember
Abse
AbseOP3w ago
one more thing the pill pads for soic not working should I update something ?
No description
Abse
AbseOP3w ago
works in footprinter not working in runframe
Seve
Seve3w ago
No idea, does the pcb viewer support pills? Sometimes people add svg support but not pcb viewer support
Abse
AbseOP3w ago
hmmm idk but even PNG not showing them
Seve
Seve3w ago
Yea worth looking into 👍
Abse
AbseOP3w ago
ok some pins for eg pin71 in the processor sch it has pinlabel G6, in function board it had pinlabel PWR_EN @Seve
Seve
Seve3w ago
Hmm not sure, but pinLabels axxepts an array per pin so you can do both In may be mutli function
Abse
AbseOP3w ago
ok
Seve
Seve3w ago
Bounties arent really supposed to be eligible for stars towards sponsorship but we’re just kind of letting it go atm So we’re not going to do explicit labels for bounties since its already a double dip
Abse
AbseOP3w ago
yeah make sense @Seve Addressed the reivew
Abse
AbseOP3w ago
do you have a ref or place I can get the dimensions from https://github.com/tscircuit/common/issues/3
GitHub
Implement <XiaoBoard /> · Issue #3 · tscircuit/common
Implements the waveshare xiao standard /bounty $75
Seve
Seve3w ago
I would look at waveshare boards They share kicad/eagle files and may have a guide
Abse
AbseOP3w ago
I got the footprint from sparkfun board
Seve
Seve3w ago
Wdym did you convert it somehow? Like the kicad mod file or something?
Abse
AbseOP3w ago
your talkin about the pads right ?
Seve
Seve3w ago
Yea
Abse
AbseOP3w ago
you can press on the pad it gives you the width and height , and I measured the pitch from an eagle file ofc
Seve
Seve3w ago
Yea but did you manually type it or something? We already have a footprint called m2host with the formula
Abse
AbseOP3w ago
I didn't know that lol yeah can it handel the gap ?
Seve
Seve3w ago
That probably isnt reliable, its definitely hard to validate Yea it does the gap I would just steal the formula because itll be more reliable
Abse
AbseOP3w ago
ok
Seve
Seve3w ago
Hehe sorry i guess this one was harder than arduino
Abse
AbseOP3w ago
yup lol
Seve
Seve3w ago
Fwiw it might be the first one i use 😁
Abse
AbseOP3w ago
that is amazing
Seve
Seve3w ago
We’re going to make it so these boards are available in the standard library as well So a lot of people will use it if tscircuit gets popular
Abse
AbseOP3w ago
I wasted so much time on this 🥹
No description
Abse
AbseOP3w ago
it was there all along
Seve
Seve3w ago
Haha well fwiw the cutout is kind of bad on it The guy who made this got the pads wrong a bunch But eventually i think it got fixrd
Abse
AbseOP3w ago
yeah the sparkfun bottom pads are little bit longer but that is not an issue right ?
Abse
AbseOP3w ago
not sure the cutout will look good above the curve in the board ?
No description
Seve
Seve3w ago
Yea no remove the cutout The outline is sufficient If sparkfun pads are longer then i would go longer That footprint was never physically tested Question everything hahaha
Abse
AbseOP3w ago
I think the footprint is hard coded I can't chagne anything no string flags like in normal fps?
Seve
Seve3w ago
Im saying you should copy the formula, not use the string
Abse
AbseOP3w ago
oh got it
Seve
Seve3w ago
Yea cuz you need to add the custom hole etc anyway
Abse
AbseOP3w ago
it is exactly like mine lol 0.5 pitch and all
Seve
Seve3w ago
Did you use a formula? I thought i saw hard coded numbers
Abse
AbseOP3w ago
no I mean like the numbers are like mine , I will use the formula
Seve
Seve3w ago
Right we want to inline the formula in tsx, it’s easier to validate and maintain
Abse
AbseOP3w ago
I stayed up all night and I'm passing out soon 😂 I deleted the diff fixed the RESET and added the diff png and svg to gitignore
Abse
AbseOP3w ago
I couldn't find Xiao board on waveshare , can I use this ?
Abse
AbseOP3w ago
there are a lot of variants tho
Abse
AbseOP3w ago
most common as board as chat gpt saying
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Seve
Seve3w ago
Ahh right seeed Its seeed not waveshare yep Thanks merging!
Abse
AbseOP3w ago
hey not sure where to find the holes pos for the pads
Abse
AbseOP3w ago
No description
Abse
AbseOP3w ago
I looked onine couldn't find any spec for the holes
Seve
Seve3w ago
They are probably standard 0.1in header holes For the perforated edge or the inner hole? The perforated edge im not sure,
Abse
AbseOP3w ago
No description
Abse
AbseOP3w ago
not sure if we can I use this as a ref wdyt?
Seve
Seve3w ago
Yea sgtm It doesnt actually matter for soldering afaik CC @0hmx
Abse
AbseOP3w ago
@Seve you want the shcematic to right and left only ?
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Seve
Seve3w ago
yea generally that's how we like it we'll need a style guide at some point
Abse
AbseOP3w ago
@Seve can I use this for any info not in the pdf ?
Seve
Seve3w ago
sure, fwiw that's a "receiver" that you put the board onto, so it's a bit different than actually designing the board iiuc, but should be ok the receivers have bigger pads and stuff which you wouldn't want on the actual board
Abse
AbseOP3w ago
I have the pad size from the pdf my issu is with top and bottom pads pos will that be ok ?
Seve
Seve3w ago
probably it would be better to download the eagle files if they have them anywhere but they may not ig
Abse
AbseOP3w ago
I will try to find an y
Abse
AbseOP3w ago
got it
No description
Abse
AbseOP3w ago
the pads on the sides are on both top and bottom should I make the same pad with the same pinhint from both top and bottom ?
Seve
Seve3w ago
not sure i understand
Abse
AbseOP3w ago
No description
Abse
AbseOP3w ago
No description
Abse
AbseOP3w ago
is it ok to have the same pin hint for both top and bottom pads ? they should be connected
Seve
Seve3w ago
oh no i don't think so i'm actually kind of confused are there two boxes? you can just specify layers=["top", "bottom"] or does that not work
Abse
AbseOP3w ago
let me check
Seve
Seve3w ago
oh this is kind of interesting, it's really like you want a platedhole with a rect pad and offset hole
Abse
AbseOP3w ago
I mean we can just make the plated hole do the connectino tion between top and bottom
Seve
Seve3w ago
yea but you should be able to do this whole thing (except for the perforation) as a single element <platedhole padShape="rect" rectWidth="..." holeOffsetX holeOffsetY /> i think we might not fully support it in props but we support it in circuit json
Abse
AbseOP3w ago
how about I make the pinhint for the plated hole only not the pads
Seve
Seve3w ago
it's a hack though, this is an official-ish repo
Abse
AbseOP3w ago
what do you recommend
Seve
Seve3w ago
Seve
Seve3w ago
wdyt
Abse
AbseOP3w ago
sounds good let me start it @Seve hey I was busy and I'm just starting the plated hole issue , to be clear is this going to be new component <platedholewithpad /> or just add props and the logic to the platedhole.ts can u clear this for me
Seve
Seve3w ago
it's just platedhole new props yea
Abse
AbseOP3w ago
ok @Seve what are these
export interface CircularHoleWithRectPlatedProps
extends Omit<PcbLayoutProps, "pcbRotation" | "layer"> {
name?: string
connectsTo?: string | string[]
shape: "circular_hole_with_rect_pad"
holeDiameter: number | string
rectPadWidth: number | string
rectPadHeight: number | string
rectBorderRadius?: number | string
holeShape?: "circle"
padShape?: "rect"
portHints?: PortHints
pcbHoleOffsetX?: number | string
pcbHoleOffsetY?: number | string
}

export interface PillWithRectPadPlatedHoleProps
extends Omit<PcbLayoutProps, "pcbRotation" | "layer"> {
name?: string
connectsTo?: string | string[]
shape: "pill_hole_with_rect_pad"
holeShape: "pill"
padShape: "rect"
holeWidth: number | string
holeHeight: number | string
rectPadWidth: number | string
rectPadHeight: number | string
portHints?: PortHints
}
export interface CircularHoleWithRectPlatedProps
extends Omit<PcbLayoutProps, "pcbRotation" | "layer"> {
name?: string
connectsTo?: string | string[]
shape: "circular_hole_with_rect_pad"
holeDiameter: number | string
rectPadWidth: number | string
rectPadHeight: number | string
rectBorderRadius?: number | string
holeShape?: "circle"
padShape?: "rect"
portHints?: PortHints
pcbHoleOffsetX?: number | string
pcbHoleOffsetY?: number | string
}

export interface PillWithRectPadPlatedHoleProps
extends Omit<PcbLayoutProps, "pcbRotation" | "layer"> {
name?: string
connectsTo?: string | string[]
shape: "pill_hole_with_rect_pad"
holeShape: "pill"
padShape: "rect"
holeWidth: number | string
holeHeight: number | string
rectPadWidth: number | string
rectPadHeight: number | string
portHints?: PortHints
}
already in props
Seve
Seve3w ago
oh lol Rishabh spent all day implementing that i totally forgot CC @Rishabh you saved Abse haha oh it's missing holeOffsetX and holeOffsetY though i think is that right?
Abse
AbseOP3w ago
the pill is yes
Seve
Seve3w ago
ah ok so you've still got a bit of work, i've reopened the issue
Abse
AbseOP3w ago
yeah it's not working the shapes are not exposed Ig , maybe core implementation needed ? I will check
No description
Seve
Seve3w ago
Rishabh was super frusterated because of all the dependency updates required, so we're going to prioritize the auto dependency updaters haha
Abse
AbseOP3w ago
wait yeah it's working @Seve I don't think the offset is there tho
Seve
Seve3w ago
yea the types will work after merge to props but you have to pass through the props via core so you have to update core
Abse
AbseOP3w ago
I think we need to update circuitJson too
Seve
Seve3w ago
it should have hole offset iirc maybe but i hope not because that means we'd also need to update svg rendering most likely
Abse
AbseOP3w ago
no offset
No description
Seve
Seve3w ago
fml yea gotta add it there, then circuit-to-svg support do you have OpenAI codex? that might speed it up
Abse
AbseOP3w ago
nope
Seve
Seve3w ago
do you want it? I can get you a card
Abse
AbseOP3w ago
yeah that will be amazing
Seve
Seve3w ago
DM'd
Abse
AbseOP3w ago
@Seve it's taking forever for codex to finish the PR stuck on this
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Seve
Seve3w ago
codex takes 10 minutes per PR
Abse
AbseOP3w ago
oh
Seve
Seve3w ago
usually with codex you spin up a lot of different tasks in parallel, it's not good for active development there is a codex CLI/vscode extension that might be better for active development
Abse
AbseOP3w ago
do you still have that prompt for codex ?
Seve
Seve3w ago
No description
Seve
Seve3w ago
Run any tests you introduce or that might be relevant to your changes with "bun test path/to/dir" or "bun test path/to/test/file.test.ts". Run bun update --latest some-dep to get the latest version of a dependency. SVG snapshots (where .toMatchSchematicSnapshot or .toMatchSvgSnapshot etc. are used) require setting BUN_UPDATE_SNAPSHOTS=1 prior to bun test .... Run "bun run format" at the end. ALWAYS RUN bunx tsc --noEmit IN TYPESCRIPT PROJECTS TO TYPECHECK! WHen using codex you'll want to create draft PRs then pull the PRs locally for some types of fixes, so it's good to know about the gh pr checkout 123 command (where 123 is your PR number)
Abse
AbseOP3w ago
GitHub
Add hole offsets to rectangular pad plated holes by Abse2001 · Pul...
Summary add hole_offset_x/hole_offset_y support to pill and rotated pill plated holes with rectangular pads document the new offset fields alongside the plated hole type definitions extend test co...
Seve
Seve3w ago
CC @Rishabh i just want to clarify because we don't normally do offsets, the hole_offset_x in core should be the position AFTER rotation is applied, so the hole is always at platedhole.center.x + platedhole.hole_offset_x it's not the "pre-rotation" x/y
Abse
AbseOP3w ago
should I merge ? @Seve so what do I need to do in circuit-to-svg ?
Seve
Seve3w ago
Make it work? Idk if hole offsets render right? Codex could probably do it, just tell it to update corcuit json and make some examples in a single test with a pcb snapshot
Abse
AbseOP3w ago
do I need to implement it in core first ?
Seve
Seve3w ago
I usually recommend circuit to svg first
Abse
AbseOP3w ago
I didn't do a circuit-to-svg in a long time
Seve
Seve3w ago
If you donit in circuit to svg first you can have a proper core snapshot test Ai is really good at circuit to svg, and codex can update deps etc, just make sure to describe what you want well If you add .diff to the end of a pr url, you can get a patch that codex works with well, just copy and paste the patch https://patch-diff.githubusercontent.com/raw/tscircuit/circuit-json/pull/281.diff Same as https://github.com/tscircuit/circuit-json/pull/281.diff
Abse
AbseOP3w ago
ok @Seve we shouldn't add circuit-json dep right ? we need to update it in tscircuit ?
Abse
AbseOP3w ago
GitHub
Handle assembly rectangular pad offsets by Abse2001 · Pull Request...
Summary respect the pill and rotated pill rectangular pad hole offsets in assembly SVG output and propagate rect border radius styling adjust the rectangular pad renderer to read optional hole off...
Seve
Seve3w ago
Yea although imo it should be allowed as a dev dep So you could add an exception for circuit json Nice work!
Abse
AbseOP3w ago
@Seve https://github.com/tscircuit/circuit-to-svg/pull/320 can you review this , codex created another PR for some reason ?
GitHub
Handle assembly rectangular pad offsets by Abse2001 · Pull Request...
Summary respect the pill and rotated pill rectangular pad hole offsets in assembly SVG output and propagate rect border radius styling adjust the rectangular pad renderer to read optional hole off...
Abse
AbseOP3w ago
@Seve why alot of core tests are not routed on my local repo ?
Abse
AbseOP3w ago
Abse
AbseOP3w ago
I had to downgrade bun to bun -v 1.1.20 just to run the tests
Rishabh
Rishabh3w ago
I guess it could be becuase of the recent segfaults error in the bun version 1.2.22
Abse
AbseOP3w ago
do you have the same issue ? even after the downgrade the routes still fail on my end
Rishabh
Rishabh3w ago
I am on the version 1.2.10, and I don't see that error
Abse
AbseOP3w ago
ok let me check
abse@DESKTOP-DJTK2QV:~/core$ bun -v
1.2.10
abse@DESKTOP-DJTK2QV:~/core$ bun test
bun test v1.2.10 (db2e7d7f)

tests/createElementUsage.test.tsx:
============================================================
Bun v1.2.10 (db2e7d7f) Linux x64
WSL Kernel v5.15.167 | glibc v2.39
CPU: sse42 popcnt avx avx2
Args: "bun" "test"
Features: Bun.stderr(2) bunfig dotenv jsc transpiler_cache tsconfig(2) tsconfig_paths unsupported_uv_function
Builtins: "node:assert" "node:child_process" "node:constants" "node:fs" "node:os" "node:path" "node:stream" "node:util"
Elapsed: 88ms | User: 67ms | Sys: 33ms
RSS: 1.07GB | Peak: 91.76MB | Commit: 1.07GB | Faults: 1

Bun encountered a crash when running a NAPI module that tried to call
the uv_version_string libuv function.

Bun is actively working on supporting all libuv functions for POSIX
systems, please see this issue to track our progress:

https://github.com/oven-sh/bun/issues/18546

panic(main thread): unsupported uv function: uv_version_string
Crashed while while loading native module: /home/abse/core/node_modules/sharp/build/Release/sharp-linux-x64.node
https://bun.report/1.2.10/lt1db2e7d7ugQi0gQ+yg6iD658y9Di4q4Uot04U2zjoS8xrBmisBi7K23mD2xKA0eNorzSsuLSjILypJTVEoLVNIK81LLsnMz7NSKC2LL0stKs7Mz4svLinKzEsHAGxuEPs
abse@DESKTOP-DJTK2QV:~/core$ bun -v
1.2.10
abse@DESKTOP-DJTK2QV:~/core$ bun test
bun test v1.2.10 (db2e7d7f)

tests/createElementUsage.test.tsx:
============================================================
Bun v1.2.10 (db2e7d7f) Linux x64
WSL Kernel v5.15.167 | glibc v2.39
CPU: sse42 popcnt avx avx2
Args: "bun" "test"
Features: Bun.stderr(2) bunfig dotenv jsc transpiler_cache tsconfig(2) tsconfig_paths unsupported_uv_function
Builtins: "node:assert" "node:child_process" "node:constants" "node:fs" "node:os" "node:path" "node:stream" "node:util"
Elapsed: 88ms | User: 67ms | Sys: 33ms
RSS: 1.07GB | Peak: 91.76MB | Commit: 1.07GB | Faults: 1

Bun encountered a crash when running a NAPI module that tried to call
the uv_version_string libuv function.

Bun is actively working on supporting all libuv functions for POSIX
systems, please see this issue to track our progress:

https://github.com/oven-sh/bun/issues/18546

panic(main thread): unsupported uv function: uv_version_string
Crashed while while loading native module: /home/abse/core/node_modules/sharp/build/Release/sharp-linux-x64.node
https://bun.report/1.2.10/lt1db2e7d7ugQi0gQ+yg6iD658y9Di4q4Uot04U2zjoS8xrBmisBi7K23mD2xKA0eNorzSsuLSjILypJTVEoLVNIK81LLsnMz7NSKC2LL0stKs7Mz4svLinKzEsHAGxuEPs
Rishabh
Rishabh3w ago
Not sure then
Abse
AbseOP3w ago
thanks for your time I will keep looking I'm going to try to do the core hole offset with codex and then I'm going to do a clean linux version I think something is wrong @Seve hay I'm going to build the RPI 4 model b hat+ , chatgpt said it's common wdyt ? and can you tell me how to fix the props I need to merge the hole offset to finish the xiao board can I use this eagle file (not an official) https://forums.raspberrypi.com/viewtopic.php?t=82618
Abse
AbseOP3w ago
GitHub
GitHub - acrobotic/Ai_HAT_Motor: PCB design files (EAGLE) for a Ras...
PCB design files (EAGLE) for a Raspberry Pi A+/B+/2/3 HAT carrying a motor/servo drivers (DRV8835 and PCA9685, respectively) and 4-Ch ADC (ADS1115). - acrobotic/Ai_HAT_Motor
Abse
AbseOP3w ago
@Seve we have this in core and we don't have props special for PcbHoleRotatedPillWithRectPad
else if (props.shape === "pill" && props.rectPad) {
const pcb_plated_hole = db.pcb_plated_hole.insert({
pcb_component_id,
pcb_port_id: this.matchedPort?.pcb_port_id!,
outer_width: props.outerWidth,
outer_height: props.outerHeight,
hole_width: props.holeWidth,
hole_height: props.holeHeight,
shape: "",
type: "pcb_plated_hole",
port_hints: this.getNameAndAliases(),
pcb_plated_hole_id: this.pcb_plated_hole_id,
x: position.x,
y: position.y,
layers: ["top", "bottom"],
subcircuit_id: subcircuit?.subcircuit_id ?? undefined,
pcb_group_id: this.getGroup()?.pcb_group_id ?? undefined,
hole_shape: "rotated_pill",
pad_shape: "rect",
hole_ccw_rotation: props.pcbRotation ?? 0,
rect_ccw_rotation: props.pcbRotation ?? 0,
rect_pad_width: props.outerWidth,
rect_pad_height: props.outerHeight,
} as PcbHoleRotatedPillWithRectPad)
else if (props.shape === "pill" && props.rectPad) {
const pcb_plated_hole = db.pcb_plated_hole.insert({
pcb_component_id,
pcb_port_id: this.matchedPort?.pcb_port_id!,
outer_width: props.outerWidth,
outer_height: props.outerHeight,
hole_width: props.holeWidth,
hole_height: props.holeHeight,
shape: "",
type: "pcb_plated_hole",
port_hints: this.getNameAndAliases(),
pcb_plated_hole_id: this.pcb_plated_hole_id,
x: position.x,
y: position.y,
layers: ["top", "bottom"],
subcircuit_id: subcircuit?.subcircuit_id ?? undefined,
pcb_group_id: this.getGroup()?.pcb_group_id ?? undefined,
hole_shape: "rotated_pill",
pad_shape: "rect",
hole_ccw_rotation: props.pcbRotation ?? 0,
rect_ccw_rotation: props.pcbRotation ?? 0,
rect_pad_width: props.outerWidth,
rect_pad_height: props.outerHeight,
} as PcbHoleRotatedPillWithRectPad)
this is the only issue so we either support it or remove it ?
Seve
Seve3w ago
Ahh ok so we meed to adjust props Yea lets do it
Abse
AbseOP3w ago
just one thing why we have PcbHoleRotatedPillWithRectPad & PcbHolePillWithRectPad ? @Seve in circuit-json
Seve
Seve3w ago
honestly it's a bit dumb but it also doesn't matter that much, but the goal is to. make it so that it's easy to implement components incrementally
Abse
AbseOP3w ago
so I will make props RotatedPillWithRectPadPlatedHoleProps with what circuitjson need ?
Seve
Seve3w ago
i think you just need to add holeOffsetX and holeOffsetY as optional props to something right
Abse
AbseOP3w ago
yup to normal pill
Seve
Seve3w ago
yea sounds right 👍
Abse
AbseOP3w ago
@Seve why the bot is committing on my PR lol?
Seve
Seve3w ago
we used to have bots do that a lot but it's mostly a bad idea
Abse
AbseOP3w ago
GitHub
Commits · tscircuit/props
Prop definitions for tscircuit components. Contribute to tscircuit/props development by creating an account on GitHub.
Abse
AbseOP3w ago
the bot didn't add new version ? it didn't get published to npm does that has something to do with the bot commit or smth?
Seve
Seve3w ago
weird yea i'll do a workflow dispatch
Abse
AbseOP3w ago
ok
Abse
AbseOP3w ago
GitHub
Use parsed hole offsets for plated pads by Abse2001 · Pull Request...
Summary normalize holeOffsetX/holeOffsetY in the plated hole constructor so parsed props always carry numeric offsets for rectangular pad variants consume the normalized offsets in each plated-hol...
Abse
AbseOP3w ago
do I need to do anything to get this in tscircuit package ?
Seve
Seve3w ago
Itll auto pr to eval so not really
Abse
AbseOP3w ago
ok @Seve tscircuit repo has core 733 and I need 734 wdyt for the RPI hat ?? @shehab
Seve
Seve3w ago
as a reference? Yes you can probably use it, i think the hats are pretty simple iirc
Abse
AbseOP3w ago
@Seve
Abse
AbseOP3w ago
the xiao borad is almost reday too just waiting from eval to update
Seve
Seve3w ago
Gotcha Why are there so many empty pins in the pi hat?
Seve
Seve3w ago
No description
Abse
AbseOP3w ago
this is what I got in the egle file , is there other >?
Seve
Seve3w ago
We should clean this up imo Yea doesnt look right at all
Abse
AbseOP3w ago
let me check
Seve
Seve3w ago
Raspi should have an official pinout
Abse
AbseOP3w ago
ok ok
Seve
Seve3w ago
No description
Abse
AbseOP3w ago
No description
Seve
Seve3w ago
I cant find a good schematic reference Yea make sure to include pin aliases, eg GPIO10,MOSI And use showPinAliases on the schematic
Abse
AbseOP3w ago
ok
Seve
Seve3w ago
I think we need to just create our own semantic schematic representation woth GND grouped together Outline looks good
Abse
AbseOP3w ago
I will try to clean it like GND down V up etc my thoughts exactly wdyt can I be a code owner in the repo ?
Seve
Seve3w ago
Sure
Abse
AbseOP3w ago
@Seve wdyt ?
No description
Abse
AbseOP3w ago
@Seve should I push it ?
Seve
Seve3w ago
Yea Lgtm
Abse
AbseOP3w ago
almost there we only need to support platedhole offset in gerber
No description
No description
Abse
AbseOP2w ago
on the good side the SVG looks good and I fixed few things
Seve
Seve2w ago
nice work!!!!
Abse
AbseOP2w ago
@Seve what should I update to get this ? gerber supported runframe ?
Seve
Seve2w ago
yea runframe probably
Seve
Seve2w ago
Thats just a XiaoBoard right? The XiaoRp2040 would include an RP2040 The title is wromg everyrhing else is good
Abse
AbseOP2w ago
the fp are not the same I think
Abse
AbseOP2w ago
I don't think all xiao boards had one fp
Seve
Seve2w ago
Oof ok so I think XiaoBoard shouldn't include any inner pads, it should only have the consistent outside pins <XiaoReceiver variant="RP2040" /> should have the inner pins the reason if whenever you have *Board you're defining a board you're creating that contains things, a *Receiver is when you're soldering an existing component conceptually, the point of the XiaoBoard is people will start their prototyping with a Xiao board device, then they'll gradually transition to a custom board
Abse
AbseOP2w ago
ok got it can you check this @Seve
Seve
Seve2w ago
woops the naming is all off, i'll leave some comments
Abse
AbseOP2w ago
ok
Seve
Seve2w ago
but an XioaRP2040 is something that contains an RP2040
Abse
AbseOP2w ago
so what should we name it
Seve
Seve2w ago
it's a XiaoReceiver variant="RP2040" or for testing <XiaoReceiverRP2040 /> or XiaoRP2040Receiver />
Abse
AbseOP2w ago
got it
Seve
Seve2w ago
it's actually not quite right to be a receiver @Abse it's fine. Let's merge as is The Receiver doesn't have the outer holes the most useful thing is the Receiver board and the XiaoBoard (with no variant), those will be the two things people use the most. Having a XiaoBoardRP2040 is a bit odd, but it's not wrong Generally speaking, we really don't care much about the variants, we just want the common pads We should add XiaoReceiver because people will use that even more than XiaoBoard like i'll order a keyboard with a <XiaoReceiver /> then ask JLCPCB to place a XiaoRP2040 into it
Abse
AbseOP2w ago
just the no variant one without the holes ?
Seve
Seve2w ago
yep the user should still be able to specify variant and we should eventually add the inner holes, but the most important part of specifying the variant is actually just so that we can provide the JLCPCB part number so it can be automatically assembled haha sorry for the confusion, i thought xiao boards were more uniform
Abse
AbseOP2w ago
no problem haha so I will edit the PR to have only the receiver or should I keep these too ?
Seve
Seve2w ago
you can keep them, we'll figure it out incrementally
Abse
AbseOP2w ago
ok
Seve
Seve2w ago
I would personally probably use the receiver on my first board, but i would also order an XiaoRP2040 with an RP2040 on it so that issue i created is to wire up an RP2040 to the XiaoBoardRP2040 you created that would recreate the rp2040-zero
Abse
AbseOP2w ago
yeah can I get assigned to that ?
Seve
Seve2w ago
yea you have to comment github thing
Abse
AbseOP2w ago
ok @Seve for the reciver without the holes does it have smtpads just on top or for both top and bottom ?
Seve
Seve2w ago
The receiver has holes, just not the perforated edge outer holes The receiver only had it on bottom yea
Abse
AbseOP2w ago
oh got it sorry wdym , like we put the plated holes not the perforated ones
Seve
Seve2w ago
Yep
Abse
AbseOP2w ago
so we have a top and bottom pads
Seve
Seve2w ago
Oh hmm yea i guess so yea youre right Wait ok no im an idiot lets make it configurable Usually no holes Sorry havemt made one of these before but like the pico, its either with top pads only OR with bottom,top and holes
Abse
AbseOP2w ago
ok so for the reciver we use top only no holes plated or the edge ones
Seve
Seve2w ago
The edge holes are never on the receiver And they user could theoretically configure the other plated holes in case they wanted to make the xiao removable via female headers
Abse
AbseOP2w ago
should we make the plated hole a prop ?
Seve
Seve2w ago
Yea basically “withPlatedHoles”
Abse
AbseOP2w ago
ok if withPlatedHoles if false we only use a top smtpad no point of using bottom right ?
Seve
Seve2w ago
Yep! 100%
Abse
AbseOP2w ago
got it
Seve
Seve2w ago
final answer Hahaha Appreciate it, sry i got a bit confused there in the middle
Abse
AbseOP2w ago
haha no worries
Abse
AbseOP2w ago
should we make the edge holes a prop too ? I just made them false for Reciver but work with any other variant
Seve
Seve2w ago
It doesnt really make sense to have them on as a receiver prop
Abse
AbseOP2w ago
So is the PR ready to merge?
Abse
AbseOP2w ago
@Seve https://github.com/tscircuit/common/issues/14 for the CM5Receiver do we want to put it on a board or just a group and import it to any board we want to put the CM5 chip on ?
Abse
AbseOP2w ago
also for the distance between the board to board connectors I had to measure it by the ruler to be almost 34 mm from the kicad file that you taged from the issue
Abse
AbseOP2w ago
No description
No description
Abse
AbseOP2w ago
I sent the kicad file to chatgpt and it said it's 33.98 mm
No description
Abse
AbseOP2w ago
@Seve is this still valid someone is PRing to fix and claim https://github.com/tscircuit/easyeda-converter/issues/124
GitHub
[C388629] Failed to import from JLCPCB · Issue #124 · tscircuit/e...
I tried to import the part number C388629 from JLCPCB, but it failed. Here&#39;s the error I got: Failed to generate snippet from JLCPCB part: Invalid shape type: A~M 380 304 A 4 4 0 1 1 380 296~~#...
Abse
AbseOP2w ago
it is failing in tscircuit.com I checked @Seve can you review this @Seve are you going to publish the common repo to npm soon so I can start working on the RP2040 ?
Seve
Seve2w ago
Yea i couldn’t because of the typecheck If that gets fixed will do Might need to yalc until then!!!!
Abse
AbseOP2w ago
Abse
AbseOP2w ago
@Seve and for the CM5 receiver do we need a board or just a group to put the connector on any board we want ?
Seve
Seve2w ago
No board i think yea Just a ComputeModule5Receiver
Abse
AbseOP2w ago
when ever you got time review this all tests are passing in common repo now too https://github.com/tscircuit/common/pull/15
Abse
AbseOP2w ago
@Seve
Seve
Seve2w ago
Kk will publish in a minute and itll autopublish after that
Seve
Seve2w ago
build is still failing
No description
Abse
AbseOP2w ago
let me check it
Seve
Seve2w ago
i'm going to be afk in a sec also try not to have spaces in directory names lib is the standard directory for libs
Abse
AbseOP2w ago
oh ok got it
Seve
Seve2w ago
i'm going afk for 2 hours but i published w/o types, and merges (which i can review remotely, or you can merge w/ good judgement) should publish new versions via the workflow
Abse
AbseOP2w ago
I fixed the build command
Abse
AbseOP2w ago
GitHub
GitHub - tscircuit/common: Common/community-contributed components
Common/community-contributed components. Contribute to tscircuit/common development by creating an account on GitHub.
Abse
AbseOP2w ago
@Seve I'm not sure what to do with the schematic wdyt ? https://github.com/tscircuit/common/pull/17
Abse
AbseOP2w ago
@Seve https://github.com/tscircuit/common the workflow is not publishing my last PR to npm
GitHub
GitHub - tscircuit/common: Common/community-contributed components
Common/community-contributed components. Contribute to tscircuit/common development by creating an account on GitHub.
Abse
AbseOP2w ago
For the CM5 it's SVG issue 3d viewer is fine
Seve
Seve2w ago
hmm we should patch that- but also i think adding a board would be helpful CC @Andrii
Abse
AbseOP2w ago
About the schematic box what should we do, how can I make two connectors in one box with two 3d models and when ordering the quantity should be two?
Seve
Seve2w ago
there's an issue for it what do other people do?
Seve
Seve2w ago
i'd like if it was a single box i think https://github.com/tscircuit/core/issues/1348
GitHub
Support a <subcircuit />/<group /> having a single schematic bo...
We want to enable subcircuits to have a single schematic box representation, this way you can have e.g. a group of pinheaders representing a single schematic box for an arduino shield. Propose any ...
Abse
AbseOP2w ago
In kicad the two connectors are one component
Seve
Seve2w ago
yea ok so we have to merge the fix for this issue first then i think
Abse
AbseOP2w ago
Yeah I will try to start working on it tomorrow hopefully @Seve
Abse
AbseOP2w ago
GitHub
feat(group): add schematic box customization props by Abse2001 · P...
Summary add spacing, style, label, and symbol configuration props for group schematic boxes document the new group schematic customization props in README and generated component docs cover the ne...
Abse
AbseOP2w ago
wait I don't think we need schSymbol or Display value @Seve do we need any other props ? connections and show as sch box already implemented ?
Abse
AbseOP2w ago
GitHub
feat(group): add schematic box customization props by Abse2001 · P...
Summary add spacing, style, label, and symbol configuration props for group schematic boxes document the new group schematic customization props in README and generated component docs cover the ne...
Seve
Seve2w ago
i think that's good! nice btw the autocomplete endpoint is merged will test if it works soon
Abse
AbseOP2w ago
GitHub
Add schematic pin arrangement schema support for schematic box grou...
PR Body add schematic_pin_arrangement (with alias map support) to schematic components while keeping port_arrangement for backwards compatibility allow source/schematic groups to publish schematic...
Abse
AbseOP2w ago
@Seve hey wdym in the request change I'm using codex and kinda lost in here haha
No description
Seve
Seve2w ago
schematic_component has is_schematic_group
Abse
AbseOP2w ago
yeah
Seve
Seve2w ago
so that has everything you need you don't need to change circuit-json
Abse
AbseOP2w ago
ok nice so I can tick the circuit json step from the issue right ? ok now to core implementation
Seve
Seve2w ago
it's probably done but you might need to add something if you find an issue during implementation in core but probably complete
Abse
AbseOP2w ago
@Seve when trying to run tsci dev
import {XiaoBoard} from "@tscircuit/common"


export default () => {
return (
<XiaoBoard name="U1" variant="RP2040" />
)
}
import {XiaoBoard} from "@tscircuit/common"


export default () => {
return (
<XiaoBoard name="U1" variant="RP2040" />
)
}
No description
Abse
AbseOP2w ago
I'm not sure what is the issue
Seve
Seve2w ago
You should reproduce in eval @shibo worked on this
Abse
AbseOP2w ago
ok @Seve something like this right ?
import { test, expect } from "bun:test"
import { runTscircuitCode } from "lib/runner"

test(
"should support importing XiaoBoard from @tscircuit/common",
async () => {
const circuitJson = await runTscircuitCode(`
import {XiaoBoard} from "@tscircuit/common"
import React from 'react'

export default () => {
return (
<XiaoBoard name="U1" variant="RP2040">
</XiaoBoard>
)
}
`)

// Verify that the component was processed without errors
// You might want to add more specific assertions based on what you expect in the output
expect(circuitJson).toBeDefined()
console.log(circuitJson)
},
{ timeout: 15000 },
)
import { test, expect } from "bun:test"
import { runTscircuitCode } from "lib/runner"

test(
"should support importing XiaoBoard from @tscircuit/common",
async () => {
const circuitJson = await runTscircuitCode(`
import {XiaoBoard} from "@tscircuit/common"
import React from 'react'

export default () => {
return (
<XiaoBoard name="U1" variant="RP2040">
</XiaoBoard>
)
}
`)

// Verify that the component was processed without errors
// You might want to add more specific assertions based on what you expect in the output
expect(circuitJson).toBeDefined()
console.log(circuitJson)
},
{ timeout: 15000 },
)
it is passing tho so idk what is the issue
Seve
Seve2w ago
Hmmmmmm @shibo might know whats up The next step could be to replicate in RunFrame
Abse
AbseOP2w ago
maybe in cli ? I will check both
Seve
Seve2w ago
Idk seems like a webworker thing to me In fact In that eval test you should try with the webworker
Abse
AbseOP2w ago
working
import { createCircuitWebWorker } from "lib"
import { test, expect } from "bun:test"

test("should support importing XiaoBoard from @tscircuit/common", async () => {
const circuitWebWorker = await createCircuitWebWorker({
webWorkerUrl: new URL("../../webworker/entrypoint.ts", import.meta.url),
})

await circuitWebWorker.execute(`
import {XiaoBoard} from "@tscircuit/common"
import React from 'react'

circuit.add(
<XiaoBoard name="U1" variant="RP2040" />
)
`)

await circuitWebWorker.renderUntilSettled()
const circuitJson = await circuitWebWorker.getCircuitJson()

console.log(circuitJson)

// Verify that the component was processed without errors
expect(circuitJson).toBeDefined()

// Check if the XiaoBoard was properly added to the circuit
const xiaoBoard = circuitJson.find((el: any) =>
el.name === "U1" && el.type === "source_component"
)

expect(xiaoBoard).toBeDefined()

// Clean up
await circuitWebWorker.kill()
}, 15000)
import { createCircuitWebWorker } from "lib"
import { test, expect } from "bun:test"

test("should support importing XiaoBoard from @tscircuit/common", async () => {
const circuitWebWorker = await createCircuitWebWorker({
webWorkerUrl: new URL("../../webworker/entrypoint.ts", import.meta.url),
})

await circuitWebWorker.execute(`
import {XiaoBoard} from "@tscircuit/common"
import React from 'react'

circuit.add(
<XiaoBoard name="U1" variant="RP2040" />
)
`)

await circuitWebWorker.renderUntilSettled()
const circuitJson = await circuitWebWorker.getCircuitJson()

console.log(circuitJson)

// Verify that the component was processed without errors
expect(circuitJson).toBeDefined()

// Check if the XiaoBoard was properly added to the circuit
const xiaoBoard = circuitJson.find((el: any) =>
el.name === "U1" && el.type === "source_component"
)

expect(xiaoBoard).toBeDefined()

// Clean up
await circuitWebWorker.kill()
}, 15000)
Seve
Seve2w ago
Yea strange, but if its a cors issue itll fail in runframe Thats the only thing i can think og Also check network panel for failed request
Abse
AbseOP2w ago
working
No description
No description
Abse
AbseOP2w ago
on runframe
Seve
Seve2w ago
Not a good test You need to have runframe run eval Gotta provide the source as a prop
Abse
AbseOP2w ago
ok
Seve
Seve2w ago
fsMap After that, next test would go to tscircuit.com running local
Abse
AbseOP2w ago
we got the same error
No description
Seve
Seve2w ago
Nice Any network request failures? You could PR to at least give people a good repro fwiw
Abse
AbseOP2w ago
No description
Seve
Seve2w ago
Not found? We should throw a better error jsdelvivr isnt indexing it maybe Maybe because its new
Abse
AbseOP2w ago
what is jsdelvivr
Seve
Seve2w ago
A cdn for npm packages
Seve
Seve2w ago
jsDelivr
@tscircuit/common CDN by jsDelivr - A CDN for npm and GitHub
A free, fast, and reliable CDN for @tscircuit/common. These are community-contributed &quot;common&quot; boards or components distributed with tscircuit
Seve
Seve2w ago
Cdn url is different tho Also why would it work in eval I think RunFrame might have a weird config or something Maybe check urls in eval vs runframe?
Abse
AbseOP2w ago
ok
Seve
Seve2w ago
Make sure eval is latest too in runframe
Abse
AbseOP2w ago
yeah latest is this test correct?
import { test, expect } from "bun:test"
import { createCircuitWebWorker } from "@tscircuit/eval"
import evalWebWorkerBlobUrl from "@tscircuit/eval/blob-url"
import type { PcbComponent } from "circuit-json"

test("CircuitWebWorker should handle circuit evaluation", async () => {
const worker = await createCircuitWebWorker({
webWorkerUrl: evalWebWorkerBlobUrl,
verbose: true,
})

await worker.executeWithFsMap({
fsMap: {
"main.tsx": `
import {XiaoBoard} from "@tscircuit/common"
circuit.add(
<XiaoBoard name="U1" variant="RP2040" />
)
`,
},
entrypoint: "main.tsx",
})

await worker.renderUntilSettled()
const circuitJson = await worker.getCircuitJson()

expect(circuitJson).toBeDefined()
})
import { test, expect } from "bun:test"
import { createCircuitWebWorker } from "@tscircuit/eval"
import evalWebWorkerBlobUrl from "@tscircuit/eval/blob-url"
import type { PcbComponent } from "circuit-json"

test("CircuitWebWorker should handle circuit evaluation", async () => {
const worker = await createCircuitWebWorker({
webWorkerUrl: evalWebWorkerBlobUrl,
verbose: true,
})

await worker.executeWithFsMap({
fsMap: {
"main.tsx": `
import {XiaoBoard} from "@tscircuit/common"
circuit.add(
<XiaoBoard name="U1" variant="RP2040" />
)
`,
},
entrypoint: "main.tsx",
})

await worker.renderUntilSettled()
const circuitJson = await worker.getCircuitJson()

expect(circuitJson).toBeDefined()
})
it's passing in run frame
Seve
Seve2w ago
Its passing cuz its in bun right Vs the browser
Abse
AbseOP2w ago
yeah this is in bun but why
Seve
Seve2w ago
The browser repro could be repros/repro01.page.tsx In runframe
Abse
AbseOP2w ago
ok
Seve
Seve2w ago
Yea i would ask ai, the network request is the most important thing to mention and copy and paste as curl and give it all the data
Abse
AbseOP2w ago
how to run the same test on browser in eval ?> in tests folder right >
Seve
Seve2w ago
Playwright
Abse
AbseOP2w ago
dude it's working in the preview
No description
Abse
AbseOP2w ago
I'm too sleepy for this lol I will keep looking tomorrow
Seve
Seve2w ago
Da fuq
Abse
AbseOP2w ago
pushing this thread to show again
Seve
Seve2w ago
hehe we always have the funnest bugs
Abse
AbseOP2w ago
@Seve what is the bun version your using even after wsl clean install still not working in core tests
tests/utils/autorouting/capacity-mesh-autorouter/capacity-mesh-autorouter1.test.ts:

# Unhandled error between tests
-------------------------------
32 | if (loadedModule) {
33 | const [, loadedPackage] = loadedModule.match(/node_modules[\\/]([^\\/]+)[\\/]/);
34 | help.push(`- Ensure the version of sharp aligns with the ${loadedPackage} package: "npm ls sharp"`);
35 | }
36 | }
37 | throw new Error(help.join('\n'));
^
error:
Something went wrong installing the "sharp" module

Cannot find module '../build/Release/sharp-linux-x64.node' from '/home/abse/core/node_modules/sharp/lib/sharp.js'

Possible solutions:
- Install with verbose logging and look for errors: "npm install --ignore-scripts=false --foreground-scripts --verbose sharp"
- Install for the current linux-x64 runtime: "npm install --platform=linux --arch=x64 sharp"
- Consult the installation documentation: https://sharp.pixelplumbing.com/install
at /home/abse/core/node_modules/sharp/lib/sharp.js:37:13
at anonymous (unknown:1:1)
at /home/abse/core/node_modules/sharp/lib/constructor.js:169:37
at anonymous (unknown:1:1)
at /home/abse/core/node_modules/sharp/lib/index.js:8:26
at anonymous (unknown:1:1)
at /home/abse/core/node_modules/looks-same/lib/image/index.js:5:1
at anonymous (unknown:1:1)
at /home/abse/core/node_modules/looks-same/index.js:5:1
at unknown:11:43
-------------------------------


0 pass
419 fail
210 errors
tests/utils/autorouting/capacity-mesh-autorouter/capacity-mesh-autorouter1.test.ts:

# Unhandled error between tests
-------------------------------
32 | if (loadedModule) {
33 | const [, loadedPackage] = loadedModule.match(/node_modules[\\/]([^\\/]+)[\\/]/);
34 | help.push(`- Ensure the version of sharp aligns with the ${loadedPackage} package: "npm ls sharp"`);
35 | }
36 | }
37 | throw new Error(help.join('\n'));
^
error:
Something went wrong installing the "sharp" module

Cannot find module '../build/Release/sharp-linux-x64.node' from '/home/abse/core/node_modules/sharp/lib/sharp.js'

Possible solutions:
- Install with verbose logging and look for errors: "npm install --ignore-scripts=false --foreground-scripts --verbose sharp"
- Install for the current linux-x64 runtime: "npm install --platform=linux --arch=x64 sharp"
- Consult the installation documentation: https://sharp.pixelplumbing.com/install
at /home/abse/core/node_modules/sharp/lib/sharp.js:37:13
at anonymous (unknown:1:1)
at /home/abse/core/node_modules/sharp/lib/constructor.js:169:37
at anonymous (unknown:1:1)
at /home/abse/core/node_modules/sharp/lib/index.js:8:26
at anonymous (unknown:1:1)
at /home/abse/core/node_modules/looks-same/lib/image/index.js:5:1
at anonymous (unknown:1:1)
at /home/abse/core/node_modules/looks-same/index.js:5:1
at unknown:11:43
-------------------------------


0 pass
419 fail
210 errors
abse@DESKTOP-DJTK2QV:~/core$ which bun /home/abse/.bun/bin/bun abse@DESKTOP-DJTK2QV:~/core$ bun --version 1.2.22 abse@DESKTOP-DJTK2QV:~/core$ I don't know wtf is going on omg I got it finally I had to remove node modules after finishing the install
Abse
AbseOP2w ago
@Seve group shown as one schematic box is almost ready
circuit.add(
<board width={20} height={20}>
<group
name="Shield"
showAsSchematicBox
schPinArrangement={{
leftSide: { direction: "top-to-bottom", pins: ["D1", "D2"] },
}}
connections={{
D1: "J1.pin1",
D2: "J2.pin1",
}}
>
<pinheader name="J1" pinCount={3} footprint={"pinrow3"} />
<pinheader name="J2" pinCount={3} footprint={"pinrow3"} />
</group>

<resistor name="R1" footprint="0402" resistance={"4k"} schX={-2} connections={{ pin2: "Shield.D1" }} />
</board>,
)
circuit.add(
<board width={20} height={20}>
<group
name="Shield"
showAsSchematicBox
schPinArrangement={{
leftSide: { direction: "top-to-bottom", pins: ["D1", "D2"] },
}}
connections={{
D1: "J1.pin1",
D2: "J2.pin1",
}}
>
<pinheader name="J1" pinCount={3} footprint={"pinrow3"} />
<pinheader name="J2" pinCount={3} footprint={"pinrow3"} />
</group>

<resistor name="R1" footprint="0402" resistance={"4k"} schX={-2} connections={{ pin2: "Shield.D1" }} />
</board>,
)
No description
No description
Seve
Seve2w ago
Nice
Abse
AbseOP2w ago
@Seve idk wtf is the snapshots issue when I pushed the PR I didn't get these changes https://github.com/tscircuit/core/pull/1406
GitHub
Add Group Schematic Box Rendering Support by Abse2001 · Pull Reque...
Summary Allow &amp;lt;group showAsSchematicBox&amp;gt; to render descendants as a single schematic box with generated interface pins. Add GroupInterfacePort, owner lookups, and is_schematic_group ...
Abse
AbseOP2w ago
why the images are changing and the new test snapshots are not loading for me in the files changed ? locally they do
Seve
Seve2w ago
i would checkout the snapshots from origin/main (revert) then rerun usually this happens when you are getting ready to merge from main and there are minor dep changes it can sometimes cause images to change, then get fixed, but still get added to the PR
Abse
AbseOP2w ago
yeah that worked but the new test snapshot is not showing on web ? https://github.com/tscircuit/core/pull/1407
GitHub
Add Group Schematic Box Rendering Support by Abse2001 · Pull Reque...
Summary Allow &amp;lt;group showAsSchematicBox&amp;gt; to render descendants as a single schematic box with generated interface pins. Add GroupInterfacePort, owner lookups, and is_schematic_group ...
Abse
AbseOP2w ago
any naming recommendation 😅
No description
Abse
AbseOP2w ago
are we in the right track regarding this PR?
Seve
Seve2w ago
you're on the right track, it's just trying to make your changes minimal and apply the best patterns suppression is a super weird word to use
Abse
AbseOP2w ago
I blame AI
Seve
Seve2w ago
you should try to be more honest with the name, isGroupShownAsSchematicBox i believe is what that var should be new terms = additional complexity
Abse
AbseOP2w ago
yeah got it I'm bad at naming so I leave Ai do them most of the time lol
Seve
Seve2w ago
the GroupInterfacePort is really confusing because it doesn't generate any circuit json fwiw yes i think generally this PR is correct, it might take two iterations to get it to the right place though isParentGroupShownAsSchematicBox
Abse
AbseOP2w ago
ok let me take a step back and review the comments I will clean it and tag you
Seve
Seve2w ago
kk sg, it's good though, just trying to make sure we can easily maintain it
shibo
shibo2w ago
is naming the hardest part of coding or is it just a myth?
Abse
AbseOP2w ago
💯
Seve
Seve2w ago
naming = api design = hardest part
Abse
AbseOP2w ago
@Seve https://github.com/tscircuit/core/pull/1407 pushed a patch regarding your review and added comments using AI to try to explain why we need GroupInterfacePort can you recheck
GitHub
Add Group Schematic Box Rendering Support by Abse2001 · Pull Reque...
Summary Allow &amp;lt;group showAsSchematicBox&amp;gt; to render descendants as a single schematic box with generated interface pins. Add GroupInterfacePort, owner lookups, and is_schematic_group ...
Seve
Seve2w ago
the word "suppress" is still all over
Abse
AbseOP2w ago
wat omg I forgot give me a sec for _areSchematicPhasesSuppressed can we call it _shouldSkipSchematicPhases
Seve
Seve2w ago
i suggested isParentGroupSchematicBox which makes a lot more sense to me shouldSkipSchematicPhase is a derivative property of that, it would be a function that uses isParentGroupSchematicBox (if you did want to have it) isParentGroupSchematicBox is also a computed property as long as it's a computed property it's possible ok to have _shouldSkipSchematicPhases() but if it's not computed it would be bad and confusing
Abse
AbseOP2w ago
😵‍💫 yup naming is the worst
protected _shouldSkipSchematicPhases(): boolean {
if (this.isParentGroupShownAsSchematicBox) return false
if (this.root?.schematicDisabled) return true
let parent: PrimitiveComponent | null = this.parent
while (parent) {
if (parent._suppressSchematicRenderingForDescendants) return true
parent = parent.parent
}
return false
}
protected _shouldSkipSchematicPhases(): boolean {
if (this.isParentGroupShownAsSchematicBox) return false
if (this.root?.schematicDisabled) return true
let parent: PrimitiveComponent | null = this.parent
while (parent) {
if (parent._suppressSchematicRenderingForDescendants) return true
parent = parent.parent
}
return false
}
_skipSchematicRenderingForDescendants for _skipSchematicRenderingForChildren ? sorry I didn't push I was asking here @Seve .
Seve
Seve2w ago
don't store isParentGroupShownAsSchematicBox as a boolean it is a computed property don't create state because state increases complexity _isParentGroupShownAsSchematicBox() is fine, also idk because this is a lot of effort we might have to do this the "right way" so technically when schematic components are inside a group they should still be rendered, but they just don't appear by default idk we can skip it for now but it is a concern yea it's fine we can skip for now
Abse
AbseOP7d ago
hey dude sorry but I need another review it's probably not ready merge but can you give me another feedback https://github.com/tscircuit/core/pull/1407
GitHub
Add Group Schematic Box Rendering Support by Abse2001 · Pull Reque...
Summary Allow &amp;lt;group showAsSchematicBox&amp;gt; to render descendants as a single schematic box with generated interface pins. Add GroupInterfacePort, owner lookups, and is_schematic_group ...
Seve
Seve7d ago
I looked over this, i think selectAll needs to work for ports and i dont think we. Should do custom port resolution Im walking :proudpoppy: but will try to make a video It feels like a group interface port is really just a port, and we shouldn’t really have it be a dummy class The group interface port just needs to match with the underlying pcb port to determine position
Abse
AbseOP7d ago
can we reuse the children port ids in the new group box port ids?
Seve
Seve7d ago
i don't think that makes sense, like what is the perfect circuit json that would match your intuitive expectation? I think i would expect TWO schematic ports at that position
No description
Abse
AbseOP7d ago
ok ok got it
Seve
Seve7d ago
yea in some ways this is a lot easier, in some ways a bit tricky, but I think the Circuit JSON will make it easy to say "oh this is where R1.1 is but also G1.input"
Abse
AbseOP7d ago
so we need to create another port on top of the schematic port (tried that but I think the autorouter don't like that fail time out cause of iteration ? @Seve am I missing something ?
Seve
Seve7d ago
yes that's right sry for the delay
Abse
AbseOP7d ago
but how is the autoroutner going to act ? I mean isn't ports a no go zone ?
Seve
Seve7d ago
idk but if there's an autorouter bug that's a separate bug
Abse
AbseOP7d ago
can a trace go next to a port that it's not connected too ? or do you mean connect both chiled and the group
Seve
Seve7d ago
yea i think that should be fine? it's technically connected to both so that part is a bit weird but otherwise i don't see an issue with it
Abse
AbseOP7d ago
hey @Seve whenever your ready I need a review https://github.com/tscircuit/core/pull/1407
GitHub
Add Group Schematic Box Rendering Support by Abse2001 · Pull Reque...
Summary Allow &amp;lt;group showAsSchematicBox&amp;gt; to render descendants as a single schematic box with generated interface pins. Add GroupInterfacePort, owner lookups, and is_schematic_group ...
Abse
AbseOP7d ago
I added checks in the test to make sure and add consoles to make sure box and pinheaders have there own schematics ports with different ports in the same pos
Seve
Seve7d ago
👀 sorry i should be helping more with this, but i still think something is weird
Abse
AbseOP7d ago
yeah there is
Seve
Seve7d ago
why can't you just add ports to the group? is that complex
Abse
AbseOP7d ago
group doesn't have a source component id it has a group id error: <port#41(pin:1 .Shield>.D1) /> has no parent source component (parent: <group#22 name=".Shield" />) iiuc
Seve
Seve7d ago
ah ok cool so we need to figure out "should a group have a source_component since it has a schematic_component?" does it makes sense etc. I think we can give groups a schematic component i'm slowly figuring out what the data model is
Abse
AbseOP7d ago
ok if it's showschematicbox only right?
Seve
Seve7d ago
either that or we make it so that source_port doesn't need a source_component_id etc. yea only if it's schematic box we might be messing up but it's kind of unclear what a component really is
Abse
AbseOP7d ago
so I tried just doint this if (this._isShowAsSchematicBoxEnabled()) { const source_component = db.source_component.insert({ ftype: "simple_group" as any, name: this.name, }) this.source_component_id = source_component.source_component_id }
Seve
Seve7d ago
yea basically
Abse
AbseOP7d ago
and we got another issue error: <port#41(pin:1 .Shield>.D1) /> has no parent pcb component, cannot render pcb_port (parent: <group#22 name=".Shield" />)
Seve
Seve7d ago
although group_as_schematic_box is a better name for the "ftype" (which will need to be added to circuit-json later, but not an immediate concern)
Abse
AbseOP7d ago
pcb
Seve
Seve7d ago
uhh so for the PCB i think the pcb_component should be underlying pcb component hmm yea i think that is correct 🤔
Abse
AbseOP7d ago
underlying ?
Seve
Seve7d ago
yea the red
No description
Seve
Seve7d ago
so the R1.pcb_component_id
Abse
AbseOP7d ago
sorry it's almost morning here I'm not thinking right 😵‍💫
Seve
Seve7d ago
i mean so i'm starting to think we can simplify this and do it in two parts, but maybe i'm wrong
Abse
AbseOP7d ago
your call I would love to get it in steps to make sure we do this right
Seve
Seve7d ago
tbc you're doing great I'm wondering if we could get this to work as a first step to simplify/break up. the PR
<group>
<port name="MyGroupPort" connectsTo="R1.1" />
<resistor name="R1" resistance="1k" footprint="0402" />
</group>
<group>
<port name="MyGroupPort" connectsTo="R1.1" />
<resistor name="R1" resistance="1k" footprint="0402" />
</group>
Because this is conceptually very similar It's almost like a "port alias" or something but yea you're doing great, it's not an easy thing to figure out, is pretty deep in our embedded stuff
Abse
AbseOP7d ago
yeah and I don't want to bring everything down with a small bug lol core is hot ok will do this tomorrow (today it's morning lol)
Seve
Seve7d ago
tyty yea no you're doing great, exactly the kind of discussions/work i want to be having
Abse
AbseOP7d ago
just to be clear we still want a group port for the schematic but use the underlying port of the pcb components (eg R1) right
Seve
Seve7d ago
so in the output circuit json there will be a port for the group and R1 one thing we can do to communicate this detail better to future contributors and ourselves is to add a debugPorts: true feature to circuit-to-svg that clearly shows different port locations and their component. This will help us create great tests

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