ARM64 SIMD fails assertion where x86-64 SIMD does not
Found something that is possibly a bug, somewhere in C# but I dont have the skillset to diagnose the exact issue.
during JIT compilation, I found a differently defined behavior between x86 and ARM for SIMD:
https://godbolt.org/z/PjPKEKPqc
On NativeAOT,
x86 computes this as "treat the 64bits of the Vector2 as the 64bits of a double, then duplicate the double into both lanes of a Vector128<double>"
ARM fails to treat the 64bits of the Vector2 as the 64bits of a double but only when SIMD instructions are involved in the function. - assertion error
I can't tell if this is an undefined behavior, a failure on x86 to recognize the bit difference in the assertion, or an error that ARM64 is failing the Assertion. Since I'm using godbolt here, I can't test WASM to verify that at this time either (im in the process of getting some ARM hardware to benchtest my code on, but in the meantime I'm using godbolt and a friend's PC.)
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GitHub
runtime/src/coreclr/jit/lower.cpp at main · dotnet/runtime
.NET is a cross-platform runtime for cloud, mobile, desktop, and IoT apps. - dotnet/runtime
6 Replies
it does look like a bug, feel free to file an issue against dotnet/runtime. This issue is effectively fixed in .NET 11 by bumping the minimal ISA to SSE4.2 everywhere (including NAOT)
but is the error with ARM for not allowing this, or with x86 for allowing this
ah, then it's a bug that should be fixed
can you file an issue please? dotnet/runtime
... yes but I dont know specifically what the issue is
it's not for you to figure out
show your findings and let the team take it from there
GitHub
ARM64 SIMD fails assertion where x86-64 SIMD does not · Issue #120...
Description During AOT compilation, I found a differently defined behavior between x86 and ARM for SIMD: https://godbolt.org/z/PjPKEKPqc On NativeAOT, x86 computes this as "treat the 64bits of...