An impressive European FPGA platform - Cologne Chip CCGM1A1
Read with me:
• a comfortable 324 ball 0.8 mm pitch BGA
• 20,480 programmable elements (each with 8-input LUT-tree, 2x FF/Latches, 2-bit full-adder or 2x2-bit multiplier) – the biggest iCE40 has 7840 logic cells only
• 5 Gbit/s SerDes
• all GPIO support double data rate (DDR)
• YOSYS compatible!
https://colognechip.com/programmable-logic/gatemate-evaluation-board/
• a comfortable 324 ball 0.8 mm pitch BGA
• 20,480 programmable elements (each with 8-input LUT-tree, 2x FF/Latches, 2-bit full-adder or 2x2-bit multiplier) – the biggest iCE40 has 7840 logic cells only
• 5 Gbit/s SerDes
• all GPIO support double data rate (DDR)
• YOSYS compatible!
https://colognechip.com/programmable-logic/gatemate-evaluation-board/
