Slow rise time on SD_CLK causes boot failure

Hello everyone,

I would like to consult on an issue I’m having with the SD_CLK signal of my board. The board is a UPnP music server / router and it boots from an SD Card to load the Uboot, Linux Kernel, and Linux user space. There are already several boards manufactured. There is one board that fail to boot from the SD Card outright and one board that initially worked fine but failed at a later time. The rest of the boards worked fine, but it is concerning that a failure might also happen in the future.

Considering all is same (hardware / binary image loaded), there is a significant delay in the rise up time on SD_CLK signal of the failing board.

What I have done so far
  1. Replace R72 with 0Ohm – made the rise up time worse
  2. Raise the EVDD by 0.1v to 0.2v – the board booted from the SD Card
Can you point me to the direction on how to properly determine the cause of this error?

Kind regards,
Carlos

SDHC schematic is the reference design (LS1043A-RDB)
SD/SDHC/SDCX Interface schematic is our board (Note: U15 and U16 are no longer populated)
Oscilloscope image of Hantek DSO4254C the SD_CLK waveform of the failing board (in blue)
Oscilloscope image of DS1102 is the SD_CLK waveform of the passing board

@techielew@abhishek awasthi @Navadeep @Umesh Lokhande @Priyanka Singh
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