sure but you're trading correctness for performance

M

Maxine•10/20/23, 10:40 PM

what do you mean correctness, Vector3 Equals was never meant to use an epsilon

P

PerkseyOP•10/20/23, 10:40 PM

it is conceivably possible that the same effective float value has differing bits

M

Maxine•10/20/23, 10:41 PM

yep i just figured out why this wouldn't work

M

Maxine•10/20/23, 10:41 PM

things like -0 and +0

M

Maxine•10/20/23, 10:41 PM

NaN equality

PPerksey sure but you're trading correctness for performance

A

Aqua•10/20/23, 10:41 PM

i'm not even sure it would be more performant

A

Aqua•10/20/23, 10:41 PM

or if it is, its negligable

P

PerkseyOP•10/20/23, 10:41 PM

it'd be more performant for gigantic structs

A

Aqua•10/20/23, 10:41 PM

you're replacing instructions with other instructions

A

Aqua•10/20/23, 10:41 PM

true, but not for a small one like vectors

A

Aqua•10/20/23, 10:41 PM

matrix probably

P

PerkseyOP•10/20/23, 10:41 PM

oh yeah

A

Aqua•10/20/23, 10:41 PM

but not vectors

P

PerkseyOP•10/20/23, 10:41 PM

like seriously please just use specialised impls

AAqua i'm not even sure it would be more performant

M

Maxine•10/20/23, 10:42 PM

i jsut adapted this

A

Aqua•10/20/23, 10:42 PM

maybe there is something i am missing ¯\_(ツ)_/¯

M

Maxine•10/20/23, 10:42 PM

should i throw this all out and jus compare XYZ? that's fine with me

A

Aqua•10/20/23, 10:42 PM

i've done the experiments with SIMD and vectors

A

Aqua•10/20/23, 10:43 PM

and in my tests its far slower than to just do the operations directly

A

Aqua•10/20/23, 10:43 PM

because of the amount of extra bulk that goes along with it

A

Aqua•10/20/23, 10:43 PM

simd comes into its own when you do an operation multiple times, just once its often worse for perf

A

Aqua•10/20/23, 10:43 PM

which is why matrix benefits from simd

A

Aqua•10/20/23, 10:43 PM

if i'm wrong please correct me, this is just from the results of my own experiments

T

TechPizza•10/20/23, 10:44 PM

i would say that using SIMD for Vector4 is perfectly fine

T

TechPizza•10/20/23, 10:44 PM

Vector2 and Vector3 is way too painful due to not being the size of a Vector128

P

PerkseyOP•10/20/23, 10:46 PM

if (Vector128.IsHardwareAccelerated && typeof(T) == typeof(float))
{
    return Unsafe.BitCast<Vector3<T>, Vector3>(this).AsVector128().Equals(Unsafe.BitCast<Vector3<T>, Vector3>(other).AsVector128());
}

if (Vector128.IsHardwareAccelerated && typeof(T) == typeof(float))
{
    return Unsafe.BitCast<Vector3<T>, Vector3>(this).AsVector128().Equals(Unsafe.BitCast<Vector3<T>, Vector3>(other).AsVector128());
}

if (Vector128.IsHardwareAccelerated && typeof(T) == typeof(float))
{
    return Unsafe.BitCast<Vector3<T>, Vector3>(this).AsVector128().Equals(Unsafe.BitCast<Vector3<T>, Vector3>(other).AsVector128());
}

if (Vector128.IsHardwareAccelerated && typeof(T) == typeof(float))
{
    return Unsafe.BitCast<Vector3<T>, Vector3>(this).AsVector128().Equals(Unsafe.BitCast<Vector3<T>, Vector3>(other).AsVector128());
}

M

Maxine•10/20/23, 10:46 PM

is that a .net 8 method

M

Maxine•10/20/23, 10:47 PM

i like it

PPerksey ```cs if (Vector128.IsHardwareAccelerated && typeof(T) == typeof(float)) { r...

A

Aqua•10/20/23, 10:48 PM

again, just replacing instructions with other instructions
sure,

BitCast

BitCast

BitCast

BitCast may be fast, but you're introducing a comparison, a function call, etc.

M

Maxine•10/20/23, 10:48 PM

uh

M

Maxine•10/20/23, 10:48 PM

those should be inlined

M

Maxine•10/20/23, 10:48 PM

typeof(T) == typeof(Y) gets inlined

A

Aqua•10/20/23, 10:48 PM

hmmm yes fair point

M

Maxine•10/20/23, 10:48 PM

IsHardwareAcceleration gets eliminated

A

Aqua•10/20/23, 10:48 PM

i know that

M

Maxine•10/20/23, 10:49 PM

the most expensive thing here is the new Vector4

P

PerkseyOP•10/20/23, 10:49 PM

yeah all of that will be inlined and understood by the JIT

M

Maxine•10/20/23, 10:49 PM

and the SIMD itself

M

Maxine•10/20/23, 10:49 PM

for short and byte, the default equality should get optimized into a simple comparison, right?

A

Aqua•10/20/23, 10:49 PM

how does nativeaot handle this situation?

P

PerkseyOP•10/20/23, 10:49 PM

the same way the JIT does

P

PerkseyOP•10/20/23, 10:49 PM

because it is the JIT

P

PerkseyOP•10/20/23, 10:49 PM

just ahead of time

A

Aqua•10/20/23, 10:49 PM

i thought nativeaot had to do intrinsics checks at runtime?

A

Aqua•10/20/23, 10:50 PM

(the nativeaot question is more of a curiosity question)

A

Aqua•10/20/23, 10:51 PM

meh, regardless, i'm not so sure its faster than just doing a pure comparison but i am no simd expert nor do i know the intricasies of the jit/aot compiler/runtime particularly well

M

Maxine•10/20/23, 10:53 PM

v2

GenericVector.cs36.88KB

P

PerkseyOP•10/20/23, 10:53 PM

NativeAOT uses RyuJIT codegen, just has a different EE (mostly)

AAqua i thought nativeaot had to do intrinsics checks at runtime?

T

TechPizza•10/20/23, 10:54 PM

you compile it against a baseline

P

PerkseyOP•10/20/23, 10:54 PM

; Assembly listing for method NumTests:TestNum(System.Numerics.Vector4,System.Numerics.Vector4):bool (FullOpts)
; Emitting BLENDED_CODE for X64 with AVX - Windows
; FullOpts code
; optimized code
; rsp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 1 single block inlinees; 2 inlinees without PGO data

G_M000_IG01:                ;; offset=0x0000
       vzeroupper 
 
G_M000_IG02:                ;; offset=0x0003
       vmovups  xmm0, xmmword ptr [rcx]
       vmovups  xmm1, xmmword ptr [rdx]
       vcmpps   xmm2, xmm0, xmm1, 0
       vcmpps   xmm0, xmm0, xmm0, 0
       vcmpps   xmm1, xmm1, xmm1, 0
       vorps    xmm0, xmm0, xmm1
       vpcmpeqd xmm1, xmm1, xmm1
       vxorps   xmm0, xmm0, xmm1
       vorps    xmm0, xmm2, xmm0
       vpcmpeqd xmm0, xmm0, xmm1
       vpmovmskb eax, xmm0
       cmp      eax, 0xFFFF
       sete     al
       movzx    rax, al
 
G_M000_IG03:                ;; offset=0x003D
       ret      
 
; Total bytes of code 62

; Assembly listing for method NumTests:TestMan(Vector4`1[float],Vector4`1[float]):bool (FullOpts)
; Emitting BLENDED_CODE for X64 with AVX - Windows
; FullOpts code
; optimized code
; rsp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 1 single block inlinees; 2 inlinees without PGO data

G_M000_IG01:                ;; offset=0x0000
       vzeroupper 
 
G_M000_IG02:                ;; offset=0x0003
       vmovups  xmm0, xmmword ptr [rdx]
       vmovups  xmm1, xmmword ptr [rcx]
       vcmpps   xmm2, xmm1, xmm1, 0
       vcmpps   xmm3, xmm0, xmm0, 0
       vorps    xmm2, xmm2, xmm3
       vpcmpeqd xmm3, xmm3, xmm3
       vxorps   xmm2, xmm2, xmm3
       vcmpps   xmm0, xmm1, xmm0, 0
       vorps    xmm0, xmm0, xmm2
       vpcmpeqd xmm0, xmm0, xmm3
       vpmovmskb eax, xmm0
       cmp      eax, 0xFFFF
       sete     al
       movzx    rax, al
 
G_M000_IG03:                ;; offset=0x003D
       ret      
 
; Total bytes of code 62

; Assembly listing for method NumTests:TestNum(System.Numerics.Vector4,System.Numerics.Vector4):bool (FullOpts)
; Emitting BLENDED_CODE for X64 with AVX - Windows
; FullOpts code
; optimized code
; rsp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 1 single block inlinees; 2 inlinees without PGO data

G_M000_IG01:                ;; offset=0x0000
       vzeroupper 
 
G_M000_IG02:                ;; offset=0x0003
       vmovups  xmm0, xmmword ptr [rcx]
       vmovups  xmm1, xmmword ptr [rdx]
       vcmpps   xmm2, xmm0, xmm1, 0
       vcmpps   xmm0, xmm0, xmm0, 0
       vcmpps   xmm1, xmm1, xmm1, 0
       vorps    xmm0, xmm0, xmm1
       vpcmpeqd xmm1, xmm1, xmm1
       vxorps   xmm0, xmm0, xmm1
       vorps    xmm0, xmm2, xmm0
       vpcmpeqd xmm0, xmm0, xmm1
       vpmovmskb eax, xmm0
       cmp      eax, 0xFFFF
       sete     al
       movzx    rax, al
 
G_M000_IG03:                ;; offset=0x003D
       ret      
 
; Total bytes of code 62

; Assembly listing for method NumTests:TestMan(Vector4`1[float],Vector4`1[float]):bool (FullOpts)
; Emitting BLENDED_CODE for X64 with AVX - Windows
; FullOpts code
; optimized code
; rsp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 1 single block inlinees; 2 inlinees without PGO data

G_M000_IG01:                ;; offset=0x0000
       vzeroupper 
 
G_M000_IG02:                ;; offset=0x0003
       vmovups  xmm0, xmmword ptr [rdx]
       vmovups  xmm1, xmmword ptr [rcx]
       vcmpps   xmm2, xmm1, xmm1, 0
       vcmpps   xmm3, xmm0, xmm0, 0
       vorps    xmm2, xmm2, xmm3
       vpcmpeqd xmm3, xmm3, xmm3
       vxorps   xmm2, xmm2, xmm3
       vcmpps   xmm0, xmm1, xmm0, 0
       vorps    xmm0, xmm0, xmm2
       vpcmpeqd xmm0, xmm0, xmm3
       vpmovmskb eax, xmm0
       cmp      eax, 0xFFFF
       sete     al
       movzx    rax, al
 
G_M000_IG03:                ;; offset=0x003D
       ret      
 
; Total bytes of code 62

; Assembly listing for method NumTests:TestNum(System.Numerics.Vector4,System.Numerics.Vector4):bool (FullOpts)
; Emitting BLENDED_CODE for X64 with AVX - Windows
; FullOpts code
; optimized code
; rsp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 1 single block inlinees; 2 inlinees without PGO data

G_M000_IG01:                ;; offset=0x0000
       vzeroupper 
 
G_M000_IG02:                ;; offset=0x0003
       vmovups  xmm0, xmmword ptr [rcx]
       vmovups  xmm1, xmmword ptr [rdx]
       vcmpps   xmm2, xmm0, xmm1, 0
       vcmpps   xmm0, xmm0, xmm0, 0
       vcmpps   xmm1, xmm1, xmm1, 0
       vorps    xmm0, xmm0, xmm1
       vpcmpeqd xmm1, xmm1, xmm1
       vxorps   xmm0, xmm0, xmm1
       vorps    xmm0, xmm2, xmm0
       vpcmpeqd xmm0, xmm0, xmm1
       vpmovmskb eax, xmm0
       cmp      eax, 0xFFFF
       sete     al
       movzx    rax, al
 
G_M000_IG03:                ;; offset=0x003D
       ret      
 
; Total bytes of code 62

; Assembly listing for method NumTests:TestMan(Vector4`1[float],Vector4`1[float]):bool (FullOpts)
; Emitting BLENDED_CODE for X64 with AVX - Windows
; FullOpts code
; optimized code
; rsp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 1 single block inlinees; 2 inlinees without PGO data

G_M000_IG01:                ;; offset=0x0000
       vzeroupper 
 
G_M000_IG02:                ;; offset=0x0003
       vmovups  xmm0, xmmword ptr [rdx]
       vmovups  xmm1, xmmword ptr [rcx]
       vcmpps   xmm2, xmm1, xmm1, 0
       vcmpps   xmm3, xmm0, xmm0, 0
       vorps    xmm2, xmm2, xmm3
       vpcmpeqd xmm3, xmm3, xmm3
       vxorps   xmm2, xmm2, xmm3
       vcmpps   xmm0, xmm1, xmm0, 0
       vorps    xmm0, xmm0, xmm2
       vpcmpeqd xmm0, xmm0, xmm3
       vpmovmskb eax, xmm0
       cmp      eax, 0xFFFF
       sete     al
       movzx    rax, al
 
G_M000_IG03:                ;; offset=0x003D
       ret      
 
; Total bytes of code 62

; Assembly listing for method NumTests:TestNum(System.Numerics.Vector4,System.Numerics.Vector4):bool (FullOpts)
; Emitting BLENDED_CODE for X64 with AVX - Windows
; FullOpts code
; optimized code
; rsp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 1 single block inlinees; 2 inlinees without PGO data

G_M000_IG01:                ;; offset=0x0000
       vzeroupper 
 
G_M000_IG02:                ;; offset=0x0003
       vmovups  xmm0, xmmword ptr [rcx]
       vmovups  xmm1, xmmword ptr [rdx]
       vcmpps   xmm2, xmm0, xmm1, 0
       vcmpps   xmm0, xmm0, xmm0, 0
       vcmpps   xmm1, xmm1, xmm1, 0
       vorps    xmm0, xmm0, xmm1
       vpcmpeqd xmm1, xmm1, xmm1
       vxorps   xmm0, xmm0, xmm1
       vorps    xmm0, xmm2, xmm0
       vpcmpeqd xmm0, xmm0, xmm1
       vpmovmskb eax, xmm0
       cmp      eax, 0xFFFF
       sete     al
       movzx    rax, al
 
G_M000_IG03:                ;; offset=0x003D
       ret      
 
; Total bytes of code 62

; Assembly listing for method NumTests:TestMan(Vector4`1[float],Vector4`1[float]):bool (FullOpts)
; Emitting BLENDED_CODE for X64 with AVX - Windows
; FullOpts code
; optimized code
; rsp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 1 single block inlinees; 2 inlinees without PGO data

G_M000_IG01:                ;; offset=0x0000
       vzeroupper 
 
G_M000_IG02:                ;; offset=0x0003
       vmovups  xmm0, xmmword ptr [rdx]
       vmovups  xmm1, xmmword ptr [rcx]
       vcmpps   xmm2, xmm1, xmm1, 0
       vcmpps   xmm3, xmm0, xmm0, 0
       vorps    xmm2, xmm2, xmm3
       vpcmpeqd xmm3, xmm3, xmm3
       vxorps   xmm2, xmm2, xmm3
       vcmpps   xmm0, xmm1, xmm0, 0
       vorps    xmm0, xmm0, xmm2
       vpcmpeqd xmm0, xmm0, xmm3
       vpmovmskb eax, xmm0
       cmp      eax, 0xFFFF
       sete     al
       movzx    rax, al
 
G_M000_IG03:                ;; offset=0x003D
       ret      
 
; Total bytes of code 62

sure but you're trading correctness for performance

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